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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * LG.Philips LB035Q02 LCD Panel driver4 *5 * Copyright (C) 2013 Texas Instruments6 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>7 * Based on a driver by: Steve Sakoman <steve@sakoman.com>8 */9 10#include <linux/module.h>11#include <linux/delay.h>12#include <linux/spi/spi.h>13#include <linux/mutex.h>14#include <linux/gpio/consumer.h>15 16#include <video/omapfb_dss.h>17 18static const struct omap_video_timings lb035q02_timings = {19 .x_res = 320,20 .y_res = 240,21 22 .pixelclock = 6500000,23 24 .hsw = 2,25 .hfp = 20,26 .hbp = 68,27 28 .vsw = 2,29 .vfp = 4,30 .vbp = 18,31 32 .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,33 .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,34 .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,35 .de_level = OMAPDSS_SIG_ACTIVE_HIGH,36 .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,37};38 39struct panel_drv_data {40 struct omap_dss_device dssdev;41 struct omap_dss_device *in;42 43 struct spi_device *spi;44 45 int data_lines;46 47 struct omap_video_timings videomode;48 49 struct gpio_desc *enable_gpio;50};51 52#define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)53 54static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val)55{56 struct spi_message msg;57 struct spi_transfer index_xfer = {58 .len = 3,59 .cs_change = 1,60 };61 struct spi_transfer value_xfer = {62 .len = 3,63 };64 u8 buffer[16];65 66 spi_message_init(&msg);67 68 /* register index */69 buffer[0] = 0x70;70 buffer[1] = 0x00;71 buffer[2] = reg & 0x7f;72 index_xfer.tx_buf = buffer;73 spi_message_add_tail(&index_xfer, &msg);74 75 /* register value */76 buffer[4] = 0x72;77 buffer[5] = val >> 8;78 buffer[6] = val;79 value_xfer.tx_buf = buffer + 4;80 spi_message_add_tail(&value_xfer, &msg);81 82 return spi_sync(spi, &msg);83}84 85static void init_lb035q02_panel(struct spi_device *spi)86{87 /* Init sequence from page 28 of the lb035q02 spec */88 lb035q02_write_reg(spi, 0x01, 0x6300);89 lb035q02_write_reg(spi, 0x02, 0x0200);90 lb035q02_write_reg(spi, 0x03, 0x0177);91 lb035q02_write_reg(spi, 0x04, 0x04c7);92 lb035q02_write_reg(spi, 0x05, 0xffc0);93 lb035q02_write_reg(spi, 0x06, 0xe806);94 lb035q02_write_reg(spi, 0x0a, 0x4008);95 lb035q02_write_reg(spi, 0x0b, 0x0000);96 lb035q02_write_reg(spi, 0x0d, 0x0030);97 lb035q02_write_reg(spi, 0x0e, 0x2800);98 lb035q02_write_reg(spi, 0x0f, 0x0000);99 lb035q02_write_reg(spi, 0x16, 0x9f80);100 lb035q02_write_reg(spi, 0x17, 0x0a0f);101 lb035q02_write_reg(spi, 0x1e, 0x00c1);102 lb035q02_write_reg(spi, 0x30, 0x0300);103 lb035q02_write_reg(spi, 0x31, 0x0007);104 lb035q02_write_reg(spi, 0x32, 0x0000);105 lb035q02_write_reg(spi, 0x33, 0x0000);106 lb035q02_write_reg(spi, 0x34, 0x0707);107 lb035q02_write_reg(spi, 0x35, 0x0004);108 lb035q02_write_reg(spi, 0x36, 0x0302);109 lb035q02_write_reg(spi, 0x37, 0x0202);110 lb035q02_write_reg(spi, 0x3a, 0x0a0d);111 lb035q02_write_reg(spi, 0x3b, 0x0806);112}113 114static int lb035q02_connect(struct omap_dss_device *dssdev)115{116 struct panel_drv_data *ddata = to_panel_data(dssdev);117 struct omap_dss_device *in = ddata->in;118 int r;119 120 if (omapdss_device_is_connected(dssdev))121 return 0;122 123 r = in->ops.dpi->connect(in, dssdev);124 if (r)125 return r;126 127 init_lb035q02_panel(ddata->spi);128 129 return 0;130}131 132static void lb035q02_disconnect(struct omap_dss_device *dssdev)133{134 struct panel_drv_data *ddata = to_panel_data(dssdev);135 struct omap_dss_device *in = ddata->in;136 137 if (!omapdss_device_is_connected(dssdev))138 return;139 140 in->ops.dpi->disconnect(in, dssdev);141}142 143static int lb035q02_enable(struct omap_dss_device *dssdev)144{145 struct panel_drv_data *ddata = to_panel_data(dssdev);146 struct omap_dss_device *in = ddata->in;147 int r;148 149 if (!omapdss_device_is_connected(dssdev))150 return -ENODEV;151 152 if (omapdss_device_is_enabled(dssdev))153 return 0;154 155 if (ddata->data_lines)156 in->ops.dpi->set_data_lines(in, ddata->data_lines);157 in->ops.dpi->set_timings(in, &ddata->videomode);158 159 r = in->ops.dpi->enable(in);160 if (r)161 return r;162 163 if (ddata->enable_gpio)164 gpiod_set_value_cansleep(ddata->enable_gpio, 1);165 166 dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;167 168 return 0;169}170 171static void lb035q02_disable(struct omap_dss_device *dssdev)172{173 struct panel_drv_data *ddata = to_panel_data(dssdev);174 struct omap_dss_device *in = ddata->in;175 176 if (!omapdss_device_is_enabled(dssdev))177 return;178 179 if (ddata->enable_gpio)180 gpiod_set_value_cansleep(ddata->enable_gpio, 0);181 182 in->ops.dpi->disable(in);183 184 dssdev->state = OMAP_DSS_DISPLAY_DISABLED;185}186 187static void lb035q02_set_timings(struct omap_dss_device *dssdev,188 struct omap_video_timings *timings)189{190 struct panel_drv_data *ddata = to_panel_data(dssdev);191 struct omap_dss_device *in = ddata->in;192 193 ddata->videomode = *timings;194 dssdev->panel.timings = *timings;195 196 in->ops.dpi->set_timings(in, timings);197}198 199static void lb035q02_get_timings(struct omap_dss_device *dssdev,200 struct omap_video_timings *timings)201{202 struct panel_drv_data *ddata = to_panel_data(dssdev);203 204 *timings = ddata->videomode;205}206 207static int lb035q02_check_timings(struct omap_dss_device *dssdev,208 struct omap_video_timings *timings)209{210 struct panel_drv_data *ddata = to_panel_data(dssdev);211 struct omap_dss_device *in = ddata->in;212 213 return in->ops.dpi->check_timings(in, timings);214}215 216static struct omap_dss_driver lb035q02_ops = {217 .connect = lb035q02_connect,218 .disconnect = lb035q02_disconnect,219 220 .enable = lb035q02_enable,221 .disable = lb035q02_disable,222 223 .set_timings = lb035q02_set_timings,224 .get_timings = lb035q02_get_timings,225 .check_timings = lb035q02_check_timings,226 227 .get_resolution = omapdss_default_get_resolution,228};229 230static int lb035q02_probe_of(struct spi_device *spi)231{232 struct device_node *node = spi->dev.of_node;233 struct panel_drv_data *ddata = spi_get_drvdata(spi);234 struct omap_dss_device *in;235 struct gpio_desc *gpio;236 237 gpio = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW);238 if (IS_ERR(gpio))239 return dev_err_probe(&spi->dev, PTR_ERR(gpio),240 "failed to parse enable gpio\n");241 242 ddata->enable_gpio = gpio;243 244 in = omapdss_of_find_source_for_first_ep(node);245 if (IS_ERR(in)) {246 dev_err(&spi->dev, "failed to find video source\n");247 return PTR_ERR(in);248 }249 250 ddata->in = in;251 252 return 0;253}254 255static int lb035q02_panel_spi_probe(struct spi_device *spi)256{257 struct panel_drv_data *ddata;258 struct omap_dss_device *dssdev;259 int r;260 261 if (!spi->dev.of_node)262 return -ENODEV;263 264 ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);265 if (ddata == NULL)266 return -ENOMEM;267 268 spi_set_drvdata(spi, ddata);269 270 ddata->spi = spi;271 272 r = lb035q02_probe_of(spi);273 if (r)274 return r;275 276 ddata->videomode = lb035q02_timings;277 278 dssdev = &ddata->dssdev;279 dssdev->dev = &spi->dev;280 dssdev->driver = &lb035q02_ops;281 dssdev->type = OMAP_DISPLAY_TYPE_DPI;282 dssdev->owner = THIS_MODULE;283 dssdev->panel.timings = ddata->videomode;284 dssdev->phy.dpi.data_lines = ddata->data_lines;285 286 r = omapdss_register_display(dssdev);287 if (r) {288 dev_err(&spi->dev, "Failed to register panel\n");289 goto err_reg;290 }291 292 return 0;293 294err_reg:295 omap_dss_put_device(ddata->in);296 return r;297}298 299static void lb035q02_panel_spi_remove(struct spi_device *spi)300{301 struct panel_drv_data *ddata = spi_get_drvdata(spi);302 struct omap_dss_device *dssdev = &ddata->dssdev;303 struct omap_dss_device *in = ddata->in;304 305 omapdss_unregister_display(dssdev);306 307 lb035q02_disable(dssdev);308 lb035q02_disconnect(dssdev);309 310 omap_dss_put_device(in);311}312 313static const struct of_device_id lb035q02_of_match[] = {314 { .compatible = "omapdss,lgphilips,lb035q02", },315 {},316};317 318MODULE_DEVICE_TABLE(of, lb035q02_of_match);319 320static struct spi_driver lb035q02_spi_driver = {321 .probe = lb035q02_panel_spi_probe,322 .remove = lb035q02_panel_spi_remove,323 .driver = {324 .name = "panel_lgphilips_lb035q02",325 .of_match_table = lb035q02_of_match,326 .suppress_bind_attrs = true,327 },328};329 330module_spi_driver(lb035q02_spi_driver);331 332MODULE_ALIAS("spi:lgphilips,lb035q02");333MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>");334MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver");335MODULE_LICENSE("GPL");336