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1// SPDX-License-Identifier: GPL-2.0-only2/*3 * drivers/video/pvr2fb.c4 *5 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega6 * Dreamcast.7 *8 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>10 *11 * This driver is mostly based on the excellent amifb and vfb sources. It uses12 * an odd scheme for converting hardware values to/from framebuffer values,13 * here are some hacked-up formulas:14 *15 * The Dreamcast has screen offsets from each side of its four borders and16 * the start offsets of the display window. I used these values to calculate17 * 'pseudo' values (think of them as placeholders) for the fb video mode, so18 * that when it came time to convert these values back into their hardware19 * values, I could just add mode- specific offsets to get the correct mode20 * settings:21 *22 * left_margin = diwstart_h - borderstart_h;23 * right_margin = borderstop_h - (diwstart_h + xres);24 * upper_margin = diwstart_v - borderstart_v;25 * lower_margin = borderstop_v - (diwstart_h + yres);26 *27 * hsync_len = borderstart_h + (hsync_total - borderstop_h);28 * vsync_len = borderstart_v + (vsync_total - borderstop_v);29 *30 * Then, when it's time to convert back to hardware settings, the only31 * constants are the borderstart_* offsets, all other values are derived from32 * the fb video mode:33 *34 * // PAL35 * borderstart_h = 116;36 * borderstart_v = 44;37 * ...38 * borderstop_h = borderstart_h + hsync_total - hsync_len;39 * ...40 * diwstart_v = borderstart_v - upper_margin;41 *42 * However, in the current implementation, the borderstart values haven't had43 * the benefit of being fully researched, so some modes may be broken.44 */45 46#undef DEBUG47 48#include <linux/aperture.h>49#include <linux/module.h>50#include <linux/kernel.h>51#include <linux/errno.h>52#include <linux/string.h>53#include <linux/mm.h>54#include <linux/slab.h>55#include <linux/delay.h>56#include <linux/interrupt.h>57#include <linux/fb.h>58#include <linux/init.h>59#include <linux/pci.h>60 61#ifdef CONFIG_SH_DREAMCAST62#include <asm/machvec.h>63#include <mach-dreamcast/mach/sysasic.h>64#endif65 66#ifdef CONFIG_PVR2_DMA67#include <linux/pagemap.h>68#include <mach/dma.h>69#include <asm/dma.h>70#endif71 72#ifdef CONFIG_SH_STORE_QUEUES73#include <linux/uaccess.h>74#include <cpu/sq.h>75#endif76 77#ifndef PCI_DEVICE_ID_NEC_NEON25078# define PCI_DEVICE_ID_NEC_NEON250 0x006779#endif80 81/* 2D video registers */82#define DISP_BASE par->mmio_base83#define DISP_BRDRCOLR (DISP_BASE + 0x40)84#define DISP_DIWMODE (DISP_BASE + 0x44)85#define DISP_DIWADDRL (DISP_BASE + 0x50)86#define DISP_DIWADDRS (DISP_BASE + 0x54)87#define DISP_DIWSIZE (DISP_BASE + 0x5c)88#define DISP_SYNCCONF (DISP_BASE + 0xd0)89#define DISP_BRDRHORZ (DISP_BASE + 0xd4)90#define DISP_SYNCSIZE (DISP_BASE + 0xd8)91#define DISP_BRDRVERT (DISP_BASE + 0xdc)92#define DISP_DIWCONF (DISP_BASE + 0xe8)93#define DISP_DIWHSTRT (DISP_BASE + 0xec)94#define DISP_DIWVSTRT (DISP_BASE + 0xf0)95#define DISP_PIXDEPTH (DISP_BASE + 0x108)96 97/* Pixel clocks, one for TV output, doubled for VGA output */98#define TV_CLK 7423999#define VGA_CLK 37119100 101/* This is for 60Hz - the VTOTAL is doubled for interlaced modes */102#define PAL_HTOTAL 863103#define PAL_VTOTAL 312104#define NTSC_HTOTAL 857105#define NTSC_VTOTAL 262106 107/* Supported cable types */108enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };109 110/* Supported video output types */111enum { VO_PAL, VO_NTSC, VO_VGA };112 113/* Supported palette types */114enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };115 116struct pvr2_params { unsigned int val; char *name; };117static struct pvr2_params cables[] = {118 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },119};120 121static struct pvr2_params outputs[] = {122 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },123};124 125/*126 * This describes the current video mode127 */128 129static struct pvr2fb_par {130 unsigned int hsync_total; /* Clocks/line */131 unsigned int vsync_total; /* Lines/field */132 unsigned int borderstart_h;133 unsigned int borderstop_h;134 unsigned int borderstart_v;135 unsigned int borderstop_v;136 unsigned int diwstart_h; /* Horizontal offset of the display field */137 unsigned int diwstart_v; /* Vertical offset of the display field, for138 interlaced modes, this is the long field */139 unsigned long disp_start; /* Address of image within VRAM */140 unsigned char is_interlaced; /* Is the display interlaced? */141 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */142 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */143 144 void __iomem *mmio_base; /* MMIO base */145 u32 palette[16];146} *currentpar;147 148static struct fb_info *fb_info;149 150static struct fb_fix_screeninfo pvr2_fix = {151 .id = "NEC PowerVR2",152 .type = FB_TYPE_PACKED_PIXELS,153 .visual = FB_VISUAL_TRUECOLOR,154 .ypanstep = 1,155 .ywrapstep = 1,156 .accel = FB_ACCEL_NONE,157};158 159static const struct fb_var_screeninfo pvr2_var = {160 .xres = 640,161 .yres = 480,162 .xres_virtual = 640,163 .yres_virtual = 480,164 .bits_per_pixel =16,165 .red = { 11, 5, 0 },166 .green = { 5, 6, 0 },167 .blue = { 0, 5, 0 },168 .activate = FB_ACTIVATE_NOW,169 .height = -1,170 .width = -1,171 .vmode = FB_VMODE_NONINTERLACED,172};173 174static int cable_type = CT_VGA;175static int video_output = VO_VGA;176 177static int nopan = 0;178static int nowrap = 1;179 180/*181 * We do all updating, blanking, etc. during the vertical retrace period182 */183static unsigned int do_vmode_full = 0; /* Change the video mode */184static unsigned int do_vmode_pan = 0; /* Update the video mode */185static short do_blank = 0; /* (Un)Blank the screen */186 187static unsigned int is_blanked = 0; /* Is the screen blanked? */188 189#ifdef CONFIG_SH_STORE_QUEUES190static unsigned long pvr2fb_map;191#endif192 193#ifdef CONFIG_PVR2_DMA194static unsigned int shdma = PVR2_CASCADE_CHAN;195static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;196#endif197 198static struct fb_videomode pvr2_modedb[] = {199 /*200 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with201 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and202 * NTSC, so it shouldn't be a problem (I hope).203 */204 205 {206 /* 640x480 @ 60Hz interlaced (NTSC) */207 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,208 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP209 }, {210 /* 640x240 @ 60Hz (NTSC) */211 /* XXX: Broken! Don't use... */212 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,213 FB_SYNC_BROADCAST, FB_VMODE_YWRAP214 }, {215 /* 640x480 @ 60hz (VGA) */216 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,217 0, FB_VMODE_YWRAP218 },219};220 221#define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)222 223#define DEFMODE_NTSC 0224#define DEFMODE_PAL 0225#define DEFMODE_VGA 2226 227static int defmode = DEFMODE_NTSC;228static char *mode_option = NULL;229 230static inline void pvr2fb_set_pal_type(unsigned int type)231{232 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;233 234 fb_writel(type, par->mmio_base + 0x108);235}236 237static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,238 unsigned int regno,239 unsigned int val)240{241 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));242}243 244static int pvr2fb_blank(int blank, struct fb_info *info)245{246 do_blank = blank ? blank : -1;247 return 0;248}249 250static inline unsigned long get_line_length(int xres_virtual, int bpp)251{252 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);253}254 255static void set_color_bitfields(struct fb_var_screeninfo *var)256{257 switch (var->bits_per_pixel) {258 case 16: /* RGB 565 */259 pvr2fb_set_pal_type(PAL_RGB565);260 var->red.offset = 11; var->red.length = 5;261 var->green.offset = 5; var->green.length = 6;262 var->blue.offset = 0; var->blue.length = 5;263 var->transp.offset = 0; var->transp.length = 0;264 break;265 case 24: /* RGB 888 */266 var->red.offset = 16; var->red.length = 8;267 var->green.offset = 8; var->green.length = 8;268 var->blue.offset = 0; var->blue.length = 8;269 var->transp.offset = 0; var->transp.length = 0;270 break;271 case 32: /* ARGB 8888 */272 pvr2fb_set_pal_type(PAL_ARGB8888);273 var->red.offset = 16; var->red.length = 8;274 var->green.offset = 8; var->green.length = 8;275 var->blue.offset = 0; var->blue.length = 8;276 var->transp.offset = 24; var->transp.length = 8;277 break;278 }279}280 281static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,282 unsigned int green, unsigned int blue,283 unsigned int transp, struct fb_info *info)284{285 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;286 unsigned int tmp;287 288 if (regno > info->cmap.len)289 return 1;290 291 /*292 * We only support the hardware palette for 16 and 32bpp. It's also293 * expected that the palette format has been set by the time we get294 * here, so we don't waste time setting it again.295 */296 switch (info->var.bits_per_pixel) {297 case 16: /* RGB 565 */298 tmp = (red & 0xf800) |299 ((green & 0xfc00) >> 5) |300 ((blue & 0xf800) >> 11);301 302 pvr2fb_set_pal_entry(par, regno, tmp);303 break;304 case 24: /* RGB 888 */305 red >>= 8; green >>= 8; blue >>= 8;306 tmp = (red << 16) | (green << 8) | blue;307 break;308 case 32: /* ARGB 8888 */309 red >>= 8; green >>= 8; blue >>= 8;310 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;311 312 pvr2fb_set_pal_entry(par, regno, tmp);313 break;314 default:315 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);316 return 1;317 }318 319 if (regno < 16)320 ((u32*)(info->pseudo_palette))[regno] = tmp;321 322 return 0;323}324 325/*326 * Determine the cable type and initialize the cable output format. Don't do327 * anything if the cable type has been overidden (via "cable:XX").328 */329 330#define PCTRA ((void __iomem *)0xff80002c)331#define PDTRA ((void __iomem *)0xff800030)332#define VOUTC ((void __iomem *)0xa0702c00)333 334static int pvr2_init_cable(void)335{336 if (cable_type < 0) {337 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,338 PCTRA);339 cable_type = (fb_readw(PDTRA) >> 8) & 3;340 }341 342 /* Now select the output format (either composite or other) */343 /* XXX: Save the previous val first, as this reg is also AICA344 related */345 if (cable_type == CT_COMPOSITE)346 fb_writel(3 << 8, VOUTC);347 else if (cable_type == CT_RGB)348 fb_writel(1 << 9, VOUTC);349 else350 fb_writel(0, VOUTC);351 352 return cable_type;353}354 355static int pvr2fb_set_par(struct fb_info *info)356{357 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;358 struct fb_var_screeninfo *var = &info->var;359 unsigned long line_length;360 unsigned int vtotal;361 362 /*363 * XXX: It's possible that a user could use a VGA box, change the cable364 * type in hardware (i.e. switch from VGA<->composite), then change365 * modes (i.e. switching to another VT). If that happens we should366 * automagically change the output format to cope, but currently I367 * don't have a VGA box to make sure this works properly.368 */369 cable_type = pvr2_init_cable();370 if (cable_type == CT_VGA && video_output != VO_VGA)371 video_output = VO_VGA;372 373 var->vmode &= FB_VMODE_MASK;374 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)375 par->is_interlaced = 1;376 /*377 * XXX: Need to be more creative with this (i.e. allow doublecan for378 * PAL/NTSC output).379 */380 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)381 par->is_doublescan = 1;382 383 par->hsync_total = var->left_margin + var->xres + var->right_margin +384 var->hsync_len;385 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +386 var->vsync_len;387 388 if (var->sync & FB_SYNC_BROADCAST) {389 vtotal = par->vsync_total;390 if (par->is_interlaced)391 vtotal /= 2;392 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {393 /* XXX: Check for start values here... */394 /* XXX: Check hardware for PAL-compatibility */395 par->borderstart_h = 116;396 par->borderstart_v = 44;397 } else {398 /* NTSC video output */399 par->borderstart_h = 126;400 par->borderstart_v = 18;401 }402 } else {403 /* VGA mode */404 /* XXX: What else needs to be checked? */405 /*406 * XXX: We have a little freedom in VGA modes, what ranges407 * should be here (i.e. hsync/vsync totals, etc.)?408 */409 par->borderstart_h = 126;410 par->borderstart_v = 40;411 }412 413 /* Calculate the remainding offsets */414 par->diwstart_h = par->borderstart_h + var->left_margin;415 par->diwstart_v = par->borderstart_v + var->upper_margin;416 par->borderstop_h = par->diwstart_h + var->xres +417 var->right_margin;418 par->borderstop_v = par->diwstart_v + var->yres +419 var->lower_margin;420 421 if (!par->is_interlaced)422 par->borderstop_v /= 2;423 if (info->var.xres < 640)424 par->is_lowres = 1;425 426 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);427 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;428 info->fix.line_length = line_length;429 return 0;430}431 432static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)433{434 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;435 unsigned int vtotal, hsync_total;436 unsigned long line_length;437 438 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {439 pr_debug("Invalid pixclock value %d\n", var->pixclock);440 return -EINVAL;441 }442 443 if (var->xres < 320)444 var->xres = 320;445 if (var->yres < 240)446 var->yres = 240;447 if (var->xres_virtual < var->xres)448 var->xres_virtual = var->xres;449 if (var->yres_virtual < var->yres)450 var->yres_virtual = var->yres;451 452 if (var->bits_per_pixel <= 16)453 var->bits_per_pixel = 16;454 else if (var->bits_per_pixel <= 24)455 var->bits_per_pixel = 24;456 else if (var->bits_per_pixel <= 32)457 var->bits_per_pixel = 32;458 459 set_color_bitfields(var);460 461 if (var->vmode & FB_VMODE_YWRAP) {462 if (var->xoffset || var->yoffset >= var->yres_virtual) {463 var->xoffset = var->yoffset = 0;464 } else {465 if (var->xoffset > var->xres_virtual - var->xres ||466 var->yoffset > var->yres_virtual - var->yres)467 var->xoffset = var->yoffset = 0;468 }469 } else {470 var->xoffset = var->yoffset = 0;471 }472 473 /*474 * XXX: Need to be more creative with this (i.e. allow doublecan for475 * PAL/NTSC output).476 */477 if (var->yres < 480 && video_output == VO_VGA)478 var->vmode |= FB_VMODE_DOUBLE;479 480 if (video_output != VO_VGA) {481 var->sync |= FB_SYNC_BROADCAST;482 var->vmode |= FB_VMODE_INTERLACED;483 } else {484 var->sync &= ~FB_SYNC_BROADCAST;485 var->vmode &= ~FB_VMODE_INTERLACED;486 var->vmode |= FB_VMODE_NONINTERLACED;487 }488 489 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {490 var->right_margin = par->borderstop_h -491 (par->diwstart_h + var->xres);492 var->left_margin = par->diwstart_h - par->borderstart_h;493 var->hsync_len = par->borderstart_h +494 (par->hsync_total - par->borderstop_h);495 496 var->upper_margin = par->diwstart_v - par->borderstart_v;497 var->lower_margin = par->borderstop_v -498 (par->diwstart_v + var->yres);499 var->vsync_len = par->borderstop_v +500 (par->vsync_total - par->borderstop_v);501 }502 503 hsync_total = var->left_margin + var->xres + var->right_margin +504 var->hsync_len;505 vtotal = var->upper_margin + var->yres + var->lower_margin +506 var->vsync_len;507 508 if (var->sync & FB_SYNC_BROADCAST) {509 if (var->vmode & FB_VMODE_INTERLACED)510 vtotal /= 2;511 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {512 /* PAL video output */513 /* XXX: Should be using a range here ... ? */514 if (hsync_total != PAL_HTOTAL) {515 pr_debug("invalid hsync total for PAL\n");516 return -EINVAL;517 }518 } else {519 /* NTSC video output */520 if (hsync_total != NTSC_HTOTAL) {521 pr_debug("invalid hsync total for NTSC\n");522 return -EINVAL;523 }524 }525 }526 527 /* Check memory sizes */528 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);529 if (line_length * var->yres_virtual > info->fix.smem_len)530 return -ENOMEM;531 532 return 0;533}534 535static void pvr2_update_display(struct fb_info *info)536{537 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;538 struct fb_var_screeninfo *var = &info->var;539 540 /* Update the start address of the display image */541 fb_writel(par->disp_start, DISP_DIWADDRL);542 fb_writel(par->disp_start +543 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),544 DISP_DIWADDRS);545}546 547/*548 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't549 * very stable. It's probably due to the fact that a lot of the 2D video550 * registers are still undocumented.551 */552 553static void pvr2_init_display(struct fb_info *info)554{555 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;556 struct fb_var_screeninfo *var = &info->var;557 unsigned int diw_height, diw_width, diw_modulo = 1;558 unsigned int bytesperpixel = var->bits_per_pixel >> 3;559 560 /* hsync and vsync totals */561 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);562 563 /* column height, modulo, row width */564 /* since we're "panning" within vram, we need to offset things based565 * on the offset from the virtual x start to our real gfx. */566 if (video_output != VO_VGA && par->is_interlaced)567 diw_modulo += info->fix.line_length / 4;568 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);569 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;570 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,571 DISP_DIWSIZE);572 573 /* display address, long and short fields */574 fb_writel(par->disp_start, DISP_DIWADDRL);575 fb_writel(par->disp_start +576 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),577 DISP_DIWADDRS);578 579 /* border horizontal, border vertical, border color */580 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);581 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);582 fb_writel(0, DISP_BRDRCOLR);583 584 /* display window start position */585 fb_writel(par->diwstart_h, DISP_DIWHSTRT);586 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);587 588 /* misc. settings */589 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);590 591 /* clock doubler (for VGA), scan doubler, display enable */592 fb_writel(((video_output == VO_VGA) << 23) |593 (par->is_doublescan << 1) | 1, DISP_DIWMODE);594 595 /* bits per pixel */596 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);597 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH);598 599 /* video enable, color sync, interlace,600 * hsync and vsync polarity (currently unused) */601 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);602}603 604/* Simulate blanking by making the border cover the entire screen */605 606#define BLANK_BIT (1<<3)607 608static void pvr2_do_blank(void)609{610 struct pvr2fb_par *par = currentpar;611 unsigned long diwconf;612 613 diwconf = fb_readl(DISP_DIWCONF);614 if (do_blank > 0)615 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);616 else617 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);618 619 is_blanked = do_blank > 0 ? do_blank : 0;620}621 622static irqreturn_t __maybe_unused pvr2fb_interrupt(int irq, void *dev_id)623{624 struct fb_info *info = dev_id;625 626 if (do_vmode_pan || do_vmode_full)627 pvr2_update_display(info);628 if (do_vmode_full)629 pvr2_init_display(info);630 if (do_vmode_pan)631 do_vmode_pan = 0;632 if (do_vmode_full)633 do_vmode_full = 0;634 if (do_blank) {635 pvr2_do_blank();636 do_blank = 0;637 }638 return IRQ_HANDLED;639}640 641#ifdef CONFIG_PVR2_DMA642static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,643 size_t count, loff_t *ppos)644{645 unsigned long dst, start, end, len;646 unsigned int nr_pages;647 struct page **pages;648 int ret, i;649 650 if (!info->screen_base)651 return -ENODEV;652 653 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;654 655 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);656 if (!pages)657 return -ENOMEM;658 659 ret = pin_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages);660 if (ret < nr_pages) {661 if (ret < 0) {662 /*663 * Clamp the unsigned nr_pages to zero so that the664 * error handling works. And leave ret at whatever665 * -errno value was returned from GUP.666 */667 nr_pages = 0;668 } else {669 nr_pages = ret;670 /*671 * Use -EINVAL to represent a mildly desperate guess at672 * why we got fewer pages (maybe even zero pages) than673 * requested.674 */675 ret = -EINVAL;676 }677 goto out_unmap;678 }679 680 dma_configure_channel(shdma, 0x12c1);681 682 dst = (unsigned long)fb_info->screen_base + *ppos;683 start = (unsigned long)page_address(pages[0]);684 end = (unsigned long)page_address(pages[nr_pages]);685 len = nr_pages << PAGE_SHIFT;686 687 /* Half-assed contig check */688 if (start + len == end) {689 /* As we do this in one shot, it's either all or nothing.. */690 if ((*ppos + len) > fb_info->fix.smem_len) {691 ret = -ENOSPC;692 goto out_unmap;693 }694 695 dma_write(shdma, start, 0, len);696 dma_write(pvr2dma, 0, dst, len);697 dma_wait_for_completion(pvr2dma);698 699 goto out;700 }701 702 /* Not contiguous, writeout per-page instead.. */703 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {704 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {705 ret = -ENOSPC;706 goto out_unmap;707 }708 709 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);710 dma_write_page(pvr2dma, 0, dst);711 dma_wait_for_completion(pvr2dma);712 }713 714out:715 *ppos += count;716 ret = count;717 718out_unmap:719 unpin_user_pages(pages, nr_pages);720 kfree(pages);721 722 return ret;723}724#endif /* CONFIG_PVR2_DMA */725 726static const struct fb_ops pvr2fb_ops = {727 .owner = THIS_MODULE,728#ifdef CONFIG_PVR2_DMA729 .fb_read = fb_io_read,730 .fb_write = pvr2fb_write,731#else732 __FB_DEFAULT_IOMEM_OPS_RDWR,733#endif734 .fb_setcolreg = pvr2fb_setcolreg,735 .fb_blank = pvr2fb_blank,736 __FB_DEFAULT_IOMEM_OPS_DRAW,737 .fb_check_var = pvr2fb_check_var,738 .fb_set_par = pvr2fb_set_par,739 __FB_DEFAULT_IOMEM_OPS_MMAP,740};741 742#ifndef MODULE743static int pvr2_get_param_val(const struct pvr2_params *p, const char *s,744 int size)745{746 int i;747 748 for (i = 0; i < size; i++) {749 if (!strncasecmp(p[i].name, s, strlen(s)))750 return p[i].val;751 }752 return -1;753}754#endif755 756static char *pvr2_get_param_name(const struct pvr2_params *p, int val,757 int size)758{759 int i;760 761 for (i = 0; i < size; i++) {762 if (p[i].val == val)763 return p[i].name;764 }765 return NULL;766}767 768/**769 * pvr2fb_common_init770 *771 * Common init code for the PVR2 chips.772 *773 * This mostly takes care of the common aspects of the fb setup and774 * registration. It's expected that the board-specific init code has775 * already setup pvr2_fix with something meaningful at this point.776 *777 * Device info reporting is also done here, as well as picking a sane778 * default from the modedb. For board-specific modelines, simply define779 * a per-board modedb.780 *781 * Also worth noting is that the cable and video output types are likely782 * always going to be VGA for the PCI-based PVR2 boards, but we leave this783 * in for flexibility anyways. Who knows, maybe someone has tv-out on a784 * PCI-based version of these things ;-)785 */786static int __maybe_unused pvr2fb_common_init(void)787{788 struct pvr2fb_par *par = currentpar;789 unsigned long modememused, rev;790 791 fb_info->screen_base = ioremap(pvr2_fix.smem_start,792 pvr2_fix.smem_len);793 794 if (!fb_info->screen_base) {795 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");796 goto out_err;797 }798 799 par->mmio_base = ioremap(pvr2_fix.mmio_start,800 pvr2_fix.mmio_len);801 if (!par->mmio_base) {802 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");803 goto out_err;804 }805 806 fb_memset_io(fb_info->screen_base, 0, pvr2_fix.smem_len);807 808 pvr2_fix.ypanstep = nopan ? 0 : 1;809 pvr2_fix.ywrapstep = nowrap ? 0 : 1;810 811 fb_info->fbops = &pvr2fb_ops;812 fb_info->fix = pvr2_fix;813 fb_info->par = currentpar;814 fb_info->pseudo_palette = currentpar->palette;815 fb_info->flags = FBINFO_HWACCEL_YPAN;816 817 if (video_output == VO_VGA)818 defmode = DEFMODE_VGA;819 820 if (!mode_option)821 mode_option = "640x480@60";822 823 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,824 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))825 fb_info->var = pvr2_var;826 827 fb_alloc_cmap(&fb_info->cmap, 256, 0);828 829 if (register_framebuffer(fb_info) < 0)830 goto out_err;831 /*Must write PIXDEPTH to register before anything is displayed - so force init */832 pvr2_init_display(fb_info);833 834 modememused = get_line_length(fb_info->var.xres_virtual,835 fb_info->var.bits_per_pixel);836 modememused *= fb_info->var.yres_virtual;837 838 rev = fb_readl(par->mmio_base + 0x04);839 840 fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",841 fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,842 modememused >> 10,843 (unsigned long)(fb_info->fix.smem_len >> 10));844 fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",845 fb_info->var.xres, fb_info->var.yres,846 fb_info->var.bits_per_pixel,847 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),848 pvr2_get_param_name(cables, cable_type, 3),849 pvr2_get_param_name(outputs, video_output, 3));850 851#ifdef CONFIG_SH_STORE_QUEUES852 fb_notice(fb_info, "registering with SQ API\n");853 854 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,855 fb_info->fix.id, PAGE_SHARED);856 857 fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n",858 pvr2fb_map);859#endif860 861 return 0;862 863out_err:864 if (fb_info->screen_base)865 iounmap(fb_info->screen_base);866 if (par->mmio_base)867 iounmap(par->mmio_base);868 869 return -ENXIO;870}871 872#ifdef CONFIG_SH_DREAMCAST873static int __init pvr2fb_dc_init(void)874{875 if (!mach_is_dreamcast())876 return -ENXIO;877 878 /* Make a guess at the monitor based on the attached cable */879 if (pvr2_init_cable() == CT_VGA) {880 fb_info->monspecs.hfmin = 30000;881 fb_info->monspecs.hfmax = 70000;882 fb_info->monspecs.vfmin = 60;883 fb_info->monspecs.vfmax = 60;884 } else {885 /* Not VGA, using a TV (taken from acornfb) */886 fb_info->monspecs.hfmin = 15469;887 fb_info->monspecs.hfmax = 15781;888 fb_info->monspecs.vfmin = 49;889 fb_info->monspecs.vfmax = 51;890 }891 892 /*893 * XXX: This needs to pull default video output via BIOS or other means894 */895 if (video_output < 0) {896 if (cable_type == CT_VGA) {897 video_output = VO_VGA;898 } else {899 video_output = VO_NTSC;900 }901 }902 903 /*904 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.905 */906 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */907 pvr2_fix.smem_len = 8 << 20;908 909 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */910 pvr2_fix.mmio_len = 0x2000;911 912 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED,913 "pvr2 VBL handler", fb_info)) {914 return -EBUSY;915 }916 917#ifdef CONFIG_PVR2_DMA918 if (request_dma(pvr2dma, "pvr2") != 0) {919 free_irq(HW_EVENT_VSYNC, fb_info);920 return -EBUSY;921 }922#endif923 924 return pvr2fb_common_init();925}926 927static void pvr2fb_dc_exit(void)928{929 if (fb_info->screen_base) {930 iounmap(fb_info->screen_base);931 fb_info->screen_base = NULL;932 }933 if (currentpar->mmio_base) {934 iounmap(currentpar->mmio_base);935 currentpar->mmio_base = NULL;936 }937 938 free_irq(HW_EVENT_VSYNC, fb_info);939#ifdef CONFIG_PVR2_DMA940 free_dma(pvr2dma);941#endif942}943#endif /* CONFIG_SH_DREAMCAST */944 945#ifdef CONFIG_PCI946static int pvr2fb_pci_probe(struct pci_dev *pdev,947 const struct pci_device_id *ent)948{949 int ret;950 951 ret = aperture_remove_conflicting_pci_devices(pdev, "pvrfb");952 if (ret)953 return ret;954 955 ret = pci_enable_device(pdev);956 if (ret) {957 printk(KERN_ERR "pvr2fb: PCI enable failed\n");958 return ret;959 }960 961 ret = pci_request_regions(pdev, "pvr2fb");962 if (ret) {963 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");964 return ret;965 }966 967 /*968 * Slightly more exciting than the DC PVR2 .. 16MiB!969 */970 pvr2_fix.smem_start = pci_resource_start(pdev, 0);971 pvr2_fix.smem_len = pci_resource_len(pdev, 0);972 973 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);974 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);975 976 fb_info->device = &pdev->dev;977 978 return pvr2fb_common_init();979}980 981static void pvr2fb_pci_remove(struct pci_dev *pdev)982{983 if (fb_info->screen_base) {984 iounmap(fb_info->screen_base);985 fb_info->screen_base = NULL;986 }987 if (currentpar->mmio_base) {988 iounmap(currentpar->mmio_base);989 currentpar->mmio_base = NULL;990 }991 992 pci_release_regions(pdev);993}994 995static const struct pci_device_id pvr2fb_pci_tbl[] = {996 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,997 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },998 { 0, },999};1000 1001MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);1002 1003static struct pci_driver pvr2fb_pci_driver = {1004 .name = "pvr2fb",1005 .id_table = pvr2fb_pci_tbl,1006 .probe = pvr2fb_pci_probe,1007 .remove = pvr2fb_pci_remove,1008};1009 1010static int __init pvr2fb_pci_init(void)1011{1012 return pci_register_driver(&pvr2fb_pci_driver);1013}1014 1015static void pvr2fb_pci_exit(void)1016{1017 pci_unregister_driver(&pvr2fb_pci_driver);1018}1019#endif /* CONFIG_PCI */1020 1021/*1022 * Parse command arguments. Supported arguments are:1023 * inverse Use inverse color maps1024 * cable:composite|rgb|vga Override the video cable type1025 * output:NTSC|PAL|VGA Override the video output format1026 *1027 * <xres>x<yres>[-<bpp>][@<refresh>] or,1028 * <name>[-<bpp>][@<refresh>] Startup using this video mode1029 */1030 1031#ifndef MODULE1032static int __init pvr2fb_setup(char *options)1033{1034 char *this_opt;1035 char cable_arg[80];1036 char output_arg[80];1037 1038 if (!options || !*options)1039 return 0;1040 1041 cable_arg[0] = output_arg[0] = 0;1042 1043 while ((this_opt = strsep(&options, ","))) {1044 if (!*this_opt)1045 continue;1046 if (!strcmp(this_opt, "inverse")) {1047 fb_invert_cmaps();1048 } else if (!strncmp(this_opt, "cable:", 6)) {1049 strcpy(cable_arg, this_opt + 6);1050 } else if (!strncmp(this_opt, "output:", 7)) {1051 strcpy(output_arg, this_opt + 7);1052 } else if (!strncmp(this_opt, "nopan", 5)) {1053 nopan = 1;1054 } else if (!strncmp(this_opt, "nowrap", 6)) {1055 nowrap = 1;1056 } else {1057 mode_option = this_opt;1058 }1059 }1060 1061 if (*cable_arg)1062 cable_type = pvr2_get_param_val(cables, cable_arg, 3);1063 if (*output_arg)1064 video_output = pvr2_get_param_val(outputs, output_arg, 3);1065 1066 return 0;1067}1068#endif1069 1070static struct pvr2_board {1071 int (*init)(void);1072 void (*exit)(void);1073 char name[16];1074} board_driver[] __refdata = {1075#ifdef CONFIG_SH_DREAMCAST1076 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },1077#endif1078#ifdef CONFIG_PCI1079 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },1080#endif1081 { 0, },1082};1083 1084static int __init pvr2fb_init(void)1085{1086 int i, ret = -ENODEV;1087 1088#ifndef MODULE1089 char *option = NULL;1090#endif1091 1092 if (fb_modesetting_disabled("pvr2fb"))1093 return -ENODEV;1094 1095#ifndef MODULE1096 if (fb_get_options("pvr2fb", &option))1097 return -ENODEV;1098 pvr2fb_setup(option);1099#endif1100 1101 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL);1102 if (!fb_info)1103 return -ENOMEM;1104 1105 currentpar = fb_info->par;1106 1107 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {1108 struct pvr2_board *pvr_board = board_driver + i;1109 1110 if (!pvr_board->init)1111 continue;1112 1113 ret = pvr_board->init();1114 1115 if (ret != 0) {1116 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",1117 pvr_board->name);1118 framebuffer_release(fb_info);1119 break;1120 }1121 }1122 1123 return ret;1124}1125 1126static void __exit pvr2fb_exit(void)1127{1128 int i;1129 1130 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {1131 struct pvr2_board *pvr_board = board_driver + i;1132 1133 if (pvr_board->exit)1134 pvr_board->exit();1135 }1136 1137#ifdef CONFIG_SH_STORE_QUEUES1138 sq_unmap(pvr2fb_map);1139#endif1140 1141 unregister_framebuffer(fb_info);1142 framebuffer_release(fb_info);1143}1144 1145module_init(pvr2fb_init);1146module_exit(pvr2fb_exit);1147 1148MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");1149MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");1150MODULE_LICENSE("GPL");1151