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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.4 */5 6#ifndef _NE_MISC_DEV_H_7#define _NE_MISC_DEV_H_8 9#include <linux/cpumask.h>10#include <linux/list.h>11#include <linux/miscdevice.h>12#include <linux/mm.h>13#include <linux/mutex.h>14#include <linux/pci.h>15#include <linux/wait.h>16 17#include "ne_pci_dev.h"18 19/**20 * struct ne_mem_region - Entry in the enclave user space memory regions list.21 * @mem_region_list_entry: Entry in the list of enclave memory regions.22 * @memory_size: Size of the user space memory region.23 * @nr_pages: Number of pages that make up the memory region.24 * @pages: Pages that make up the user space memory region.25 * @userspace_addr: User space address of the memory region.26 */27struct ne_mem_region {28 struct list_head mem_region_list_entry;29 u64 memory_size;30 unsigned long nr_pages;31 struct page **pages;32 u64 userspace_addr;33};34 35/**36 * struct ne_enclave - Per-enclave data used for enclave lifetime management.37 * @enclave_info_mutex : Mutex for accessing this internal state.38 * @enclave_list_entry : Entry in the list of created enclaves.39 * @eventq: Wait queue used for out-of-band event notifications40 * triggered from the PCI device event handler to41 * the enclave process via the poll function.42 * @has_event: Variable used to determine if the out-of-band event43 * was triggered.44 * @max_mem_regions: The maximum number of memory regions that can be45 * handled by the hypervisor.46 * @mem_regions_list: Enclave user space memory regions list.47 * @mem_size: Enclave memory size.48 * @mm : Enclave process abstraction mm data struct.49 * @nr_mem_regions: Number of memory regions associated with the enclave.50 * @nr_parent_vm_cores : The size of the threads per core array. The51 * total number of CPU cores available on the52 * parent / primary VM.53 * @nr_threads_per_core: The number of threads that a full CPU core has.54 * @nr_vcpus: Number of vcpus associated with the enclave.55 * @numa_node: NUMA node of the enclave memory and CPUs.56 * @slot_uid: Slot unique id mapped to the enclave.57 * @state: Enclave state, updated during enclave lifetime.58 * @threads_per_core: Enclave full CPU cores array, indexed by core id,59 * consisting of cpumasks with all their threads.60 * Full CPU cores are taken from the NE CPU pool61 * and are available to the enclave.62 * @vcpu_ids: Cpumask of the vCPUs that are set for the enclave.63 */64struct ne_enclave {65 struct mutex enclave_info_mutex;66 struct list_head enclave_list_entry;67 wait_queue_head_t eventq;68 bool has_event;69 u64 max_mem_regions;70 struct list_head mem_regions_list;71 u64 mem_size;72 struct mm_struct *mm;73 unsigned int nr_mem_regions;74 unsigned int nr_parent_vm_cores;75 unsigned int nr_threads_per_core;76 unsigned int nr_vcpus;77 int numa_node;78 u64 slot_uid;79 u16 state;80 cpumask_var_t *threads_per_core;81 cpumask_var_t vcpu_ids;82};83 84/**85 * enum ne_state - States available for an enclave.86 * @NE_STATE_INIT: The enclave has not been started yet.87 * @NE_STATE_RUNNING: The enclave was started and is running as expected.88 * @NE_STATE_STOPPED: The enclave exited without userspace interaction.89 */90enum ne_state {91 NE_STATE_INIT = 0,92 NE_STATE_RUNNING = 2,93 NE_STATE_STOPPED = U16_MAX,94};95 96/**97 * struct ne_devs - Data structure to keep refs to the NE misc and PCI devices.98 * @ne_misc_dev: Nitro Enclaves misc device.99 * @ne_pci_dev : Nitro Enclaves PCI device.100 */101struct ne_devs {102 struct miscdevice *ne_misc_dev;103 struct ne_pci_dev *ne_pci_dev;104};105 106/* Nitro Enclaves (NE) data structure for keeping refs to the NE misc and PCI devices. */107extern struct ne_devs ne_devs;108 109#endif /* _NE_MISC_DEV_H_ */110