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1// SPDX-License-Identifier: GPL-2.0-only2/*3 *  Copyright 20104 *  by Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>5 *6 * This code provides a IOMMU for Xen PV guests with PCI passthrough.7 *8 * PV guests under Xen are running in an non-contiguous memory architecture.9 *10 * When PCI pass-through is utilized, this necessitates an IOMMU for11 * translating bus (DMA) to virtual and vice-versa and also providing a12 * mechanism to have contiguous pages for device drivers operations (say DMA13 * operations).14 *15 * Specifically, under Xen the Linux idea of pages is an illusion. It16 * assumes that pages start at zero and go up to the available memory. To17 * help with that, the Linux Xen MMU provides a lookup mechanism to18 * translate the page frame numbers (PFN) to machine frame numbers (MFN)19 * and vice-versa. The MFN are the "real" frame numbers. Furthermore20 * memory is not contiguous. Xen hypervisor stitches memory for guests21 * from different pools, which means there is no guarantee that PFN==MFN22 * and PFN+1==MFN+1. Lastly with Xen 4.0, pages (in debug mode) are23 * allocated in descending order (high to low), meaning the guest might24 * never get any MFN's under the 4GB mark.25 */26 27#define pr_fmt(fmt) "xen:" KBUILD_MODNAME ": " fmt28 29#include <linux/memblock.h>30#include <linux/dma-direct.h>31#include <linux/dma-map-ops.h>32#include <linux/export.h>33#include <xen/swiotlb-xen.h>34#include <xen/page.h>35#include <xen/xen-ops.h>36#include <xen/hvc-console.h>37 38#include <asm/dma-mapping.h>39 40#include <trace/events/swiotlb.h>41#define MAX_DMA_BITS 3242 43/*44 * Quick lookup value of the bus address of the IOTLB.45 */46 47static inline phys_addr_t xen_phys_to_bus(struct device *dev, phys_addr_t paddr)48{49	unsigned long bfn = pfn_to_bfn(XEN_PFN_DOWN(paddr));50	phys_addr_t baddr = (phys_addr_t)bfn << XEN_PAGE_SHIFT;51 52	baddr |= paddr & ~XEN_PAGE_MASK;53	return baddr;54}55 56static inline dma_addr_t xen_phys_to_dma(struct device *dev, phys_addr_t paddr)57{58	return phys_to_dma(dev, xen_phys_to_bus(dev, paddr));59}60 61static inline phys_addr_t xen_bus_to_phys(struct device *dev,62					  phys_addr_t baddr)63{64	unsigned long xen_pfn = bfn_to_pfn(XEN_PFN_DOWN(baddr));65	phys_addr_t paddr = (xen_pfn << XEN_PAGE_SHIFT) |66			    (baddr & ~XEN_PAGE_MASK);67 68	return paddr;69}70 71static inline phys_addr_t xen_dma_to_phys(struct device *dev,72					  dma_addr_t dma_addr)73{74	return xen_bus_to_phys(dev, dma_to_phys(dev, dma_addr));75}76 77static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)78{79	unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);80	unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);81	phys_addr_t algn = 1ULL << (get_order(size) + PAGE_SHIFT);82 83	next_bfn = pfn_to_bfn(xen_pfn);84 85	/* If buffer is physically aligned, ensure DMA alignment. */86	if (IS_ALIGNED(p, algn) &&87	    !IS_ALIGNED((phys_addr_t)next_bfn << XEN_PAGE_SHIFT, algn))88		return 1;89 90	for (i = 1; i < nr_pages; i++)91		if (pfn_to_bfn(++xen_pfn) != ++next_bfn)92			return 1;93 94	return 0;95}96 97static struct io_tlb_pool *xen_swiotlb_find_pool(struct device *dev,98						 dma_addr_t dma_addr)99{100	unsigned long bfn = XEN_PFN_DOWN(dma_to_phys(dev, dma_addr));101	unsigned long xen_pfn = bfn_to_local_pfn(bfn);102	phys_addr_t paddr = (phys_addr_t)xen_pfn << XEN_PAGE_SHIFT;103 104	/* If the address is outside our domain, it CAN105	 * have the same virtual address as another address106	 * in our domain. Therefore _only_ check address within our domain.107	 */108	if (pfn_valid(PFN_DOWN(paddr)))109		return swiotlb_find_pool(dev, paddr);110	return NULL;111}112 113#ifdef CONFIG_X86114int xen_swiotlb_fixup(void *buf, unsigned long nslabs)115{116	int rc;117	unsigned int order = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT);118	unsigned int i, dma_bits = order + PAGE_SHIFT;119	dma_addr_t dma_handle;120	phys_addr_t p = virt_to_phys(buf);121 122	BUILD_BUG_ON(IO_TLB_SEGSIZE & (IO_TLB_SEGSIZE - 1));123	BUG_ON(nslabs % IO_TLB_SEGSIZE);124 125	i = 0;126	do {127		do {128			rc = xen_create_contiguous_region(129				p + (i << IO_TLB_SHIFT), order,130				dma_bits, &dma_handle);131		} while (rc && dma_bits++ < MAX_DMA_BITS);132		if (rc)133			return rc;134 135		i += IO_TLB_SEGSIZE;136	} while (i < nslabs);137	return 0;138}139 140static void *141xen_swiotlb_alloc_coherent(struct device *dev, size_t size,142		dma_addr_t *dma_handle, gfp_t flags, unsigned long attrs)143{144	u64 dma_mask = dev->coherent_dma_mask;145	int order = get_order(size);146	phys_addr_t phys;147	void *ret;148 149	/* Align the allocation to the Xen page size */150	size = ALIGN(size, XEN_PAGE_SIZE);151 152	ret = (void *)__get_free_pages(flags, get_order(size));153	if (!ret)154		return ret;155	phys = virt_to_phys(ret);156 157	*dma_handle = xen_phys_to_dma(dev, phys);158	if (*dma_handle + size - 1 > dma_mask ||159	    range_straddles_page_boundary(phys, size)) {160		if (xen_create_contiguous_region(phys, order, fls64(dma_mask),161				dma_handle) != 0)162			goto out_free_pages;163		SetPageXenRemapped(virt_to_page(ret));164	}165 166	memset(ret, 0, size);167	return ret;168 169out_free_pages:170	free_pages((unsigned long)ret, get_order(size));171	return NULL;172}173 174static void175xen_swiotlb_free_coherent(struct device *dev, size_t size, void *vaddr,176		dma_addr_t dma_handle, unsigned long attrs)177{178	phys_addr_t phys = virt_to_phys(vaddr);179	int order = get_order(size);180 181	/* Convert the size to actually allocated. */182	size = ALIGN(size, XEN_PAGE_SIZE);183 184	if (WARN_ON_ONCE(dma_handle + size - 1 > dev->coherent_dma_mask) ||185	    WARN_ON_ONCE(range_straddles_page_boundary(phys, size)))186	    	return;187 188	if (TestClearPageXenRemapped(virt_to_page(vaddr)))189		xen_destroy_contiguous_region(phys, order);190	free_pages((unsigned long)vaddr, get_order(size));191}192#endif /* CONFIG_X86 */193 194/*195 * Map a single buffer of the indicated size for DMA in streaming mode.  The196 * physical address to use is returned.197 *198 * Once the device is given the dma address, the device owns this memory until199 * either xen_swiotlb_unmap_page or xen_swiotlb_dma_sync_single is performed.200 */201static dma_addr_t xen_swiotlb_map_page(struct device *dev, struct page *page,202				unsigned long offset, size_t size,203				enum dma_data_direction dir,204				unsigned long attrs)205{206	phys_addr_t map, phys = page_to_phys(page) + offset;207	dma_addr_t dev_addr = xen_phys_to_dma(dev, phys);208 209	BUG_ON(dir == DMA_NONE);210	/*211	 * If the address happens to be in the device's DMA window,212	 * we can safely return the device addr and not worry about bounce213	 * buffering it.214	 */215	if (dma_capable(dev, dev_addr, size, true) &&216	    !range_straddles_page_boundary(phys, size) &&217		!xen_arch_need_swiotlb(dev, phys, dev_addr) &&218		!is_swiotlb_force_bounce(dev))219		goto done;220 221	/*222	 * Oh well, have to allocate and map a bounce buffer.223	 */224	trace_swiotlb_bounced(dev, dev_addr, size);225 226	map = swiotlb_tbl_map_single(dev, phys, size, 0, dir, attrs);227	if (map == (phys_addr_t)DMA_MAPPING_ERROR)228		return DMA_MAPPING_ERROR;229 230	phys = map;231	dev_addr = xen_phys_to_dma(dev, map);232 233	/*234	 * Ensure that the address returned is DMA'ble235	 */236	if (unlikely(!dma_capable(dev, dev_addr, size, true))) {237		__swiotlb_tbl_unmap_single(dev, map, size, dir,238				attrs | DMA_ATTR_SKIP_CPU_SYNC,239				swiotlb_find_pool(dev, map));240		return DMA_MAPPING_ERROR;241	}242 243done:244	if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {245		if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dev_addr))))246			arch_sync_dma_for_device(phys, size, dir);247		else248			xen_dma_sync_for_device(dev, dev_addr, size, dir);249	}250	return dev_addr;251}252 253/*254 * Unmap a single streaming mode DMA translation.  The dma_addr and size must255 * match what was provided for in a previous xen_swiotlb_map_page call.  All256 * other usages are undefined.257 *258 * After this call, reads by the cpu to the buffer are guaranteed to see259 * whatever the device wrote there.260 */261static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,262		size_t size, enum dma_data_direction dir, unsigned long attrs)263{264	phys_addr_t paddr = xen_dma_to_phys(hwdev, dev_addr);265	struct io_tlb_pool *pool;266 267	BUG_ON(dir == DMA_NONE);268 269	if (!dev_is_dma_coherent(hwdev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {270		if (pfn_valid(PFN_DOWN(dma_to_phys(hwdev, dev_addr))))271			arch_sync_dma_for_cpu(paddr, size, dir);272		else273			xen_dma_sync_for_cpu(hwdev, dev_addr, size, dir);274	}275 276	/* NOTE: We use dev_addr here, not paddr! */277	pool = xen_swiotlb_find_pool(hwdev, dev_addr);278	if (pool)279		__swiotlb_tbl_unmap_single(hwdev, paddr, size, dir,280					   attrs, pool);281}282 283static void284xen_swiotlb_sync_single_for_cpu(struct device *dev, dma_addr_t dma_addr,285		size_t size, enum dma_data_direction dir)286{287	phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);288	struct io_tlb_pool *pool;289 290	if (!dev_is_dma_coherent(dev)) {291		if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))292			arch_sync_dma_for_cpu(paddr, size, dir);293		else294			xen_dma_sync_for_cpu(dev, dma_addr, size, dir);295	}296 297	pool = xen_swiotlb_find_pool(dev, dma_addr);298	if (pool)299		__swiotlb_sync_single_for_cpu(dev, paddr, size, dir, pool);300}301 302static void303xen_swiotlb_sync_single_for_device(struct device *dev, dma_addr_t dma_addr,304		size_t size, enum dma_data_direction dir)305{306	phys_addr_t paddr = xen_dma_to_phys(dev, dma_addr);307	struct io_tlb_pool *pool;308 309	pool = xen_swiotlb_find_pool(dev, dma_addr);310	if (pool)311		__swiotlb_sync_single_for_device(dev, paddr, size, dir, pool);312 313	if (!dev_is_dma_coherent(dev)) {314		if (pfn_valid(PFN_DOWN(dma_to_phys(dev, dma_addr))))315			arch_sync_dma_for_device(paddr, size, dir);316		else317			xen_dma_sync_for_device(dev, dma_addr, size, dir);318	}319}320 321/*322 * Unmap a set of streaming mode DMA translations.  Again, cpu read rules323 * concerning calls here are the same as for swiotlb_unmap_page() above.324 */325static void326xen_swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,327		enum dma_data_direction dir, unsigned long attrs)328{329	struct scatterlist *sg;330	int i;331 332	BUG_ON(dir == DMA_NONE);333 334	for_each_sg(sgl, sg, nelems, i)335		xen_swiotlb_unmap_page(hwdev, sg->dma_address, sg_dma_len(sg),336				dir, attrs);337 338}339 340static int341xen_swiotlb_map_sg(struct device *dev, struct scatterlist *sgl, int nelems,342		enum dma_data_direction dir, unsigned long attrs)343{344	struct scatterlist *sg;345	int i;346 347	BUG_ON(dir == DMA_NONE);348 349	for_each_sg(sgl, sg, nelems, i) {350		sg->dma_address = xen_swiotlb_map_page(dev, sg_page(sg),351				sg->offset, sg->length, dir, attrs);352		if (sg->dma_address == DMA_MAPPING_ERROR)353			goto out_unmap;354		sg_dma_len(sg) = sg->length;355	}356 357	return nelems;358out_unmap:359	xen_swiotlb_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);360	sg_dma_len(sgl) = 0;361	return -EIO;362}363 364static void365xen_swiotlb_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,366			    int nelems, enum dma_data_direction dir)367{368	struct scatterlist *sg;369	int i;370 371	for_each_sg(sgl, sg, nelems, i) {372		xen_swiotlb_sync_single_for_cpu(dev, sg->dma_address,373				sg->length, dir);374	}375}376 377static void378xen_swiotlb_sync_sg_for_device(struct device *dev, struct scatterlist *sgl,379			       int nelems, enum dma_data_direction dir)380{381	struct scatterlist *sg;382	int i;383 384	for_each_sg(sgl, sg, nelems, i) {385		xen_swiotlb_sync_single_for_device(dev, sg->dma_address,386				sg->length, dir);387	}388}389 390/*391 * Return whether the given device DMA address mask can be supported392 * properly.  For example, if your device can only drive the low 24-bits393 * during bus mastering, then you would pass 0x00ffffff as the mask to394 * this function.395 */396static int397xen_swiotlb_dma_supported(struct device *hwdev, u64 mask)398{399	return xen_phys_to_dma(hwdev, default_swiotlb_limit()) <= mask;400}401 402const struct dma_map_ops xen_swiotlb_dma_ops = {403#ifdef CONFIG_X86404	.alloc = xen_swiotlb_alloc_coherent,405	.free = xen_swiotlb_free_coherent,406#else407	.alloc = dma_direct_alloc,408	.free = dma_direct_free,409#endif410	.sync_single_for_cpu = xen_swiotlb_sync_single_for_cpu,411	.sync_single_for_device = xen_swiotlb_sync_single_for_device,412	.sync_sg_for_cpu = xen_swiotlb_sync_sg_for_cpu,413	.sync_sg_for_device = xen_swiotlb_sync_sg_for_device,414	.map_sg = xen_swiotlb_map_sg,415	.unmap_sg = xen_swiotlb_unmap_sg,416	.map_page = xen_swiotlb_map_page,417	.unmap_page = xen_swiotlb_unmap_page,418	.dma_supported = xen_swiotlb_dma_supported,419	.mmap = dma_common_mmap,420	.get_sgtable = dma_common_get_sgtable,421	.alloc_pages_op = dma_common_alloc_pages,422	.free_pages = dma_common_free_pages,423	.max_mapping_size = swiotlb_max_mapping_size,424};425