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1/* SPDX-License-Identifier: GPL-2.0 OR MIT */2/*3 * Copyright 2020 Advanced Micro Devices, Inc.4 *5 * Permission is hereby granted, free of charge, to any person obtaining a6 * copy of this software and associated documentation files (the "Software"),7 * to deal in the Software without restriction, including without limitation8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,9 * and/or sell copies of the Software, and to permit persons to whom the10 * Software is furnished to do so, subject to the following conditions:11 *12 * The above copyright notice and this permission notice shall be included in13 * all copies or substantial portions of the Software.14 *15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR21 * OTHER DEALINGS IN THE SOFTWARE.22 *23 * Authors: Christian König24 */25 26#ifndef _TTM_PAGE_POOL_H_27#define _TTM_PAGE_POOL_H_28 29#include <linux/mmzone.h>30#include <linux/llist.h>31#include <linux/spinlock.h>32#include <drm/ttm/ttm_caching.h>33 34struct device;35struct seq_file;36struct ttm_operation_ctx;37struct ttm_pool;38struct ttm_tt;39 40/**41 * struct ttm_pool_type - Pool for a certain memory type42 *43 * @pool: the pool we belong to, might be NULL for the global ones44 * @order: the allocation order our pages have45 * @caching: the caching type our pages have46 * @shrinker_list: our place on the global shrinker list47 * @lock: protection of the page list48 * @pages: the list of pages in the pool49 */50struct ttm_pool_type {51 struct ttm_pool *pool;52 unsigned int order;53 enum ttm_caching caching;54 55 struct list_head shrinker_list;56 57 spinlock_t lock;58 struct list_head pages;59};60 61/**62 * struct ttm_pool - Pool for all caching and orders63 *64 * @dev: the device we allocate pages for65 * @nid: which numa node to use66 * @use_dma_alloc: if coherent DMA allocations should be used67 * @use_dma32: if GFP_DMA32 should be used68 * @caching: pools for each caching/order69 */70struct ttm_pool {71 struct device *dev;72 int nid;73 74 bool use_dma_alloc;75 bool use_dma32;76 77 struct {78 struct ttm_pool_type orders[NR_PAGE_ORDERS];79 } caching[TTM_NUM_CACHING_TYPES];80};81 82int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt,83 struct ttm_operation_ctx *ctx);84void ttm_pool_free(struct ttm_pool *pool, struct ttm_tt *tt);85 86void ttm_pool_init(struct ttm_pool *pool, struct device *dev,87 int nid, bool use_dma_alloc, bool use_dma32);88void ttm_pool_fini(struct ttm_pool *pool);89 90int ttm_pool_debugfs(struct ttm_pool *pool, struct seq_file *m);91 92int ttm_pool_mgr_init(unsigned long num_pages);93void ttm_pool_mgr_fini(void);94 95#endif96