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1/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */2#ifndef DT_BINDINGS_AST2600_CLOCK_H3#define DT_BINDINGS_AST2600_CLOCK_H4 5#define ASPEED_CLK_GATE_ECLK 06#define ASPEED_CLK_GATE_GCLK 17 8#define ASPEED_CLK_GATE_MCLK 29 10#define ASPEED_CLK_GATE_VCLK 311#define ASPEED_CLK_GATE_BCLK 412#define ASPEED_CLK_GATE_DCLK 513 14#define ASPEED_CLK_GATE_LCLK 615#define ASPEED_CLK_GATE_LHCCLK 716 17#define ASPEED_CLK_GATE_D1CLK 818#define ASPEED_CLK_GATE_YCLK 919 20#define ASPEED_CLK_GATE_REF0CLK 1021#define ASPEED_CLK_GATE_REF1CLK 1122 23#define ASPEED_CLK_GATE_ESPICLK 1224 25#define ASPEED_CLK_GATE_USBUHCICLK 1326#define ASPEED_CLK_GATE_USBPORT1CLK 1427#define ASPEED_CLK_GATE_USBPORT2CLK 1528 29#define ASPEED_CLK_GATE_RSACLK 1630#define ASPEED_CLK_GATE_RVASCLK 1731 32#define ASPEED_CLK_GATE_MAC1CLK 1833#define ASPEED_CLK_GATE_MAC2CLK 1934#define ASPEED_CLK_GATE_MAC3CLK 2035#define ASPEED_CLK_GATE_MAC4CLK 2136 37#define ASPEED_CLK_GATE_UART1CLK 2238#define ASPEED_CLK_GATE_UART2CLK 2339#define ASPEED_CLK_GATE_UART3CLK 2440#define ASPEED_CLK_GATE_UART4CLK 2541#define ASPEED_CLK_GATE_UART5CLK 2642#define ASPEED_CLK_GATE_UART6CLK 2743#define ASPEED_CLK_GATE_UART7CLK 2844#define ASPEED_CLK_GATE_UART8CLK 2945#define ASPEED_CLK_GATE_UART9CLK 3046#define ASPEED_CLK_GATE_UART10CLK 3147#define ASPEED_CLK_GATE_UART11CLK 3248#define ASPEED_CLK_GATE_UART12CLK 3349#define ASPEED_CLK_GATE_UART13CLK 3450 51#define ASPEED_CLK_GATE_SDCLK 3552#define ASPEED_CLK_GATE_EMMCCLK 3653 54#define ASPEED_CLK_GATE_I3C0CLK 3755#define ASPEED_CLK_GATE_I3C1CLK 3856#define ASPEED_CLK_GATE_I3C2CLK 3957#define ASPEED_CLK_GATE_I3C3CLK 4058#define ASPEED_CLK_GATE_I3C4CLK 4159#define ASPEED_CLK_GATE_I3C5CLK 4260 61#define ASPEED_CLK_GATE_FSICLK 4562 63#define ASPEED_CLK_HPLL 4664#define ASPEED_CLK_MPLL 4765#define ASPEED_CLK_DPLL 4866#define ASPEED_CLK_EPLL 4967#define ASPEED_CLK_APLL 5068#define ASPEED_CLK_AHB 5169#define ASPEED_CLK_APB1 5270#define ASPEED_CLK_APB2 5371#define ASPEED_CLK_BCLK 5472#define ASPEED_CLK_D1CLK 5573#define ASPEED_CLK_VCLK 5674#define ASPEED_CLK_LHCLK 5775#define ASPEED_CLK_UART 5876#define ASPEED_CLK_UARTX 5977#define ASPEED_CLK_SDIO 6078#define ASPEED_CLK_EMMC 6179#define ASPEED_CLK_ECLK 6280#define ASPEED_CLK_ECLK_MUX 6381#define ASPEED_CLK_MAC12 6482#define ASPEED_CLK_MAC34 6583#define ASPEED_CLK_USBPHY_40M 6684#define ASPEED_CLK_MAC1RCLK 6785#define ASPEED_CLK_MAC2RCLK 6886#define ASPEED_CLK_MAC3RCLK 6987#define ASPEED_CLK_MAC4RCLK 7088#define ASPEED_CLK_I3C 7189#define ASPEED_CLK_FSI 7290 91/* Only list resets here that are not part of a clock gate + reset pair */92#define ASPEED_RESET_ADC 5593#define ASPEED_RESET_JTAG_MASTER2 5494 95#define ASPEED_RESET_MAC4 5396#define ASPEED_RESET_MAC3 5297 98#define ASPEED_RESET_I3C5 4599#define ASPEED_RESET_I3C4 44100#define ASPEED_RESET_I3C3 43101#define ASPEED_RESET_I3C2 42102#define ASPEED_RESET_I3C1 41103#define ASPEED_RESET_I3C0 40104#define ASPEED_RESET_I3C 39105#define ASPEED_RESET_I3C_DMA 39106 107#define ASPEED_RESET_PWM 37108#define ASPEED_RESET_PECI 36109#define ASPEED_RESET_MII 35110#define ASPEED_RESET_I2C 34111#define ASPEED_RESET_H2X 31112#define ASPEED_RESET_GP_MCU 30113#define ASPEED_RESET_DP_MCU 29114#define ASPEED_RESET_DP 28115#define ASPEED_RESET_RC_XDMA 27116#define ASPEED_RESET_GRAPHICS 26117#define ASPEED_RESET_DEV_XDMA 25118#define ASPEED_RESET_DEV_MCTP 24119#define ASPEED_RESET_RC_MCTP 23120#define ASPEED_RESET_JTAG_MASTER 22121#define ASPEED_RESET_PCIE_DEV_O 21122#define ASPEED_RESET_PCIE_DEV_OEN 20123#define ASPEED_RESET_PCIE_RC_O 19124#define ASPEED_RESET_PCIE_RC_OEN 18125#define ASPEED_RESET_PCI_DP 5126#define ASPEED_RESET_HACE 4127#define ASPEED_RESET_AHB 1128#define ASPEED_RESET_SDRAM 0129 130#endif131