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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2020 BAIKAL ELECTRONICS, JSC4 *5 * Baikal-T1 CCU clock indices6 */7#ifndef __DT_BINDINGS_CLOCK_BT1_CCU_H8#define __DT_BINDINGS_CLOCK_BT1_CCU_H9 10#define CCU_CPU_PLL 011#define CCU_SATA_PLL 112#define CCU_DDR_PLL 213#define CCU_PCIE_PLL 314#define CCU_ETH_PLL 415 16#define CCU_AXI_MAIN_CLK 017#define CCU_AXI_DDR_CLK 118#define CCU_AXI_SATA_CLK 219#define CCU_AXI_GMAC0_CLK 320#define CCU_AXI_GMAC1_CLK 421#define CCU_AXI_XGMAC_CLK 522#define CCU_AXI_PCIE_M_CLK 623#define CCU_AXI_PCIE_S_CLK 724#define CCU_AXI_USB_CLK 825#define CCU_AXI_HWA_CLK 926#define CCU_AXI_SRAM_CLK 1027 28#define CCU_SYS_SATA_REF_CLK 029#define CCU_SYS_APB_CLK 130#define CCU_SYS_GMAC0_TX_CLK 231#define CCU_SYS_GMAC0_PTP_CLK 332#define CCU_SYS_GMAC1_TX_CLK 433#define CCU_SYS_GMAC1_PTP_CLK 534#define CCU_SYS_XGMAC_REF_CLK 635#define CCU_SYS_XGMAC_PTP_CLK 736#define CCU_SYS_USB_CLK 837#define CCU_SYS_PVT_CLK 938#define CCU_SYS_HWA_CLK 1039#define CCU_SYS_UART_CLK 1140#define CCU_SYS_I2C1_CLK 1241#define CCU_SYS_I2C2_CLK 1342#define CCU_SYS_GPIO_CLK 1443#define CCU_SYS_TIMER0_CLK 1544#define CCU_SYS_TIMER1_CLK 1645#define CCU_SYS_TIMER2_CLK 1746#define CCU_SYS_WDT_CLK 1847 48#endif /* __DT_BINDINGS_CLOCK_BT1_CCU_H */49