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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2014 Linaro Ltd.4 * Copyright (c) 2014 Hisilicon Limited.5 */6 7#ifndef __DTS_HIX5HD2_CLOCK_H8#define __DTS_HIX5HD2_CLOCK_H9 10/* fixed rate */11#define HIX5HD2_FIXED_1200M 112#define HIX5HD2_FIXED_400M 213#define HIX5HD2_FIXED_48M 314#define HIX5HD2_FIXED_24M 415#define HIX5HD2_FIXED_600M 516#define HIX5HD2_FIXED_300M 617#define HIX5HD2_FIXED_75M 718#define HIX5HD2_FIXED_200M 819#define HIX5HD2_FIXED_100M 920#define HIX5HD2_FIXED_40M 1021#define HIX5HD2_FIXED_150M 1122#define HIX5HD2_FIXED_1728M 1223#define HIX5HD2_FIXED_28P8M 1324#define HIX5HD2_FIXED_432M 1425#define HIX5HD2_FIXED_345P6M 1526#define HIX5HD2_FIXED_288M 1627#define HIX5HD2_FIXED_60M 1728#define HIX5HD2_FIXED_750M 1829#define HIX5HD2_FIXED_500M 1930#define HIX5HD2_FIXED_54M 2031#define HIX5HD2_FIXED_27M 2132#define HIX5HD2_FIXED_1500M 2233#define HIX5HD2_FIXED_375M 2334#define HIX5HD2_FIXED_187M 2435#define HIX5HD2_FIXED_250M 2536#define HIX5HD2_FIXED_125M 2637#define HIX5HD2_FIXED_2P02M 2738#define HIX5HD2_FIXED_50M 2839#define HIX5HD2_FIXED_25M 2940#define HIX5HD2_FIXED_83M 3041 42/* mux clocks */43#define HIX5HD2_SFC_MUX 6444#define HIX5HD2_MMC_MUX 6545#define HIX5HD2_FEPHY_MUX 6646#define HIX5HD2_SD_MUX 6747 48/* gate clocks */49#define HIX5HD2_SFC_RST 12850#define HIX5HD2_SFC_CLK 12951#define HIX5HD2_MMC_CIU_CLK 13052#define HIX5HD2_MMC_BIU_CLK 13153#define HIX5HD2_MMC_CIU_RST 13254#define HIX5HD2_FWD_BUS_CLK 13355#define HIX5HD2_FWD_SYS_CLK 13456#define HIX5HD2_MAC0_PHY_CLK 13557#define HIX5HD2_SD_CIU_CLK 13658#define HIX5HD2_SD_BIU_CLK 13759#define HIX5HD2_SD_CIU_RST 13860#define HIX5HD2_WDG0_CLK 13961#define HIX5HD2_WDG0_RST 14062#define HIX5HD2_I2C0_CLK 14163#define HIX5HD2_I2C0_RST 14264#define HIX5HD2_I2C1_CLK 14365#define HIX5HD2_I2C1_RST 14466#define HIX5HD2_I2C2_CLK 14567#define HIX5HD2_I2C2_RST 14668#define HIX5HD2_I2C3_CLK 14769#define HIX5HD2_I2C3_RST 14870#define HIX5HD2_I2C4_CLK 14971#define HIX5HD2_I2C4_RST 15072#define HIX5HD2_I2C5_CLK 15173#define HIX5HD2_I2C5_RST 15274 75/* complex */76#define HIX5HD2_MAC0_CLK 19277#define HIX5HD2_MAC1_CLK 19378#define HIX5HD2_SATA_CLK 19479#define HIX5HD2_USB_CLK 19580 81#define HIX5HD2_NR_CLKS 25682#endif /* __DTS_HIX5HD2_CLOCK_H */83