37 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>4 */5 6#ifndef __DT_BINDINGS_CLOCK_IMX1_H7#define __DT_BINDINGS_CLOCK_IMX1_H8 9#define IMX1_CLK_DUMMY 010#define IMX1_CLK_CLK32 111#define IMX1_CLK_CLK16M_EXT 212#define IMX1_CLK_CLK16M 313#define IMX1_CLK_CLK32_PREMULT 414#define IMX1_CLK_PREM 515#define IMX1_CLK_MPLL 616#define IMX1_CLK_MPLL_GATE 717#define IMX1_CLK_SPLL 818#define IMX1_CLK_SPLL_GATE 919#define IMX1_CLK_MCU 1020#define IMX1_CLK_FCLK 1121#define IMX1_CLK_HCLK 1222#define IMX1_CLK_CLK48M 1323#define IMX1_CLK_PER1 1424#define IMX1_CLK_PER2 1525#define IMX1_CLK_PER3 1626#define IMX1_CLK_CLKO 1727#define IMX1_CLK_UART3_GATE 1828#define IMX1_CLK_SSI2_GATE 1929#define IMX1_CLK_BROM_GATE 2030#define IMX1_CLK_DMA_GATE 2131#define IMX1_CLK_CSI_GATE 2232#define IMX1_CLK_MMA_GATE 2333#define IMX1_CLK_USBD_GATE 2434#define IMX1_CLK_MAX 2535 36#endif37