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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (C) 2016 Freescale Semiconductor, Inc.4 * Copyright 2017-2018 NXP.5 *6 */7 8#ifndef __DT_BINDINGS_CLOCK_IMX6SLL_H9#define __DT_BINDINGS_CLOCK_IMX6SLL_H10 11#define IMX6SLL_CLK_DUMMY		012#define IMX6SLL_CLK_CKIL		113#define IMX6SLL_CLK_OSC			214#define IMX6SLL_PLL1_BYPASS_SRC		315#define IMX6SLL_PLL2_BYPASS_SRC		416#define IMX6SLL_PLL3_BYPASS_SRC		517#define IMX6SLL_PLL4_BYPASS_SRC		618#define IMX6SLL_PLL5_BYPASS_SRC		719#define IMX6SLL_PLL6_BYPASS_SRC		820#define IMX6SLL_PLL7_BYPASS_SRC		921#define IMX6SLL_CLK_PLL1		1022#define IMX6SLL_CLK_PLL2		1123#define IMX6SLL_CLK_PLL3		1224#define IMX6SLL_CLK_PLL4		1325#define IMX6SLL_CLK_PLL5		1426#define IMX6SLL_CLK_PLL6		1527#define IMX6SLL_CLK_PLL7		1628#define IMX6SLL_PLL1_BYPASS		1729#define IMX6SLL_PLL2_BYPASS		1830#define IMX6SLL_PLL3_BYPASS		1931#define IMX6SLL_PLL4_BYPASS		2032#define IMX6SLL_PLL5_BYPASS		2133#define IMX6SLL_PLL6_BYPASS		2234#define IMX6SLL_PLL7_BYPASS		2335#define IMX6SLL_CLK_PLL1_SYS		2436#define IMX6SLL_CLK_PLL2_BUS		2537#define IMX6SLL_CLK_PLL3_USB_OTG	2638#define IMX6SLL_CLK_PLL4_AUDIO		2739#define IMX6SLL_CLK_PLL5_VIDEO		2840#define IMX6SLL_CLK_PLL6_ENET		2941#define IMX6SLL_CLK_PLL7_USB_HOST	3042#define IMX6SLL_CLK_USBPHY1		3143#define IMX6SLL_CLK_USBPHY2		3244#define IMX6SLL_CLK_USBPHY1_GATE	3345#define IMX6SLL_CLK_USBPHY2_GATE	3446#define IMX6SLL_CLK_PLL2_PFD0		3547#define IMX6SLL_CLK_PLL2_PFD1		3648#define IMX6SLL_CLK_PLL2_PFD2		3749#define IMX6SLL_CLK_PLL2_PFD3		3850#define IMX6SLL_CLK_PLL3_PFD0		3951#define IMX6SLL_CLK_PLL3_PFD1		4052#define IMX6SLL_CLK_PLL3_PFD2		4153#define IMX6SLL_CLK_PLL3_PFD3		4254#define IMX6SLL_CLK_PLL4_POST_DIV	4355#define IMX6SLL_CLK_PLL4_AUDIO_DIV	4456#define IMX6SLL_CLK_PLL5_POST_DIV	4557#define IMX6SLL_CLK_PLL5_VIDEO_DIV	4658#define IMX6SLL_CLK_PLL2_198M		4759#define IMX6SLL_CLK_PLL3_120M		4860#define IMX6SLL_CLK_PLL3_80M		4961#define IMX6SLL_CLK_PLL3_60M		5062#define IMX6SLL_CLK_STEP		5163#define IMX6SLL_CLK_PLL1_SW		5264#define IMX6SLL_CLK_AXI_ALT_SEL		5365#define IMX6SLL_CLK_AXI_SEL		5466#define IMX6SLL_CLK_PERIPH_PRE		5567#define IMX6SLL_CLK_PERIPH2_PRE		5668#define IMX6SLL_CLK_PERIPH_CLK2_SEL	5769#define IMX6SLL_CLK_PERIPH2_CLK2_SEL	5870#define IMX6SLL_CLK_PERCLK_SEL		5971#define IMX6SLL_CLK_USDHC1_SEL		6072#define IMX6SLL_CLK_USDHC2_SEL		6173#define IMX6SLL_CLK_USDHC3_SEL		6274#define IMX6SLL_CLK_SSI1_SEL		6375#define IMX6SLL_CLK_SSI2_SEL		6476#define IMX6SLL_CLK_SSI3_SEL		6577#define IMX6SLL_CLK_PXP_SEL		6678#define IMX6SLL_CLK_LCDIF_PRE_SEL	6779#define IMX6SLL_CLK_LCDIF_SEL		6880#define IMX6SLL_CLK_EPDC_PRE_SEL	6981#define IMX6SLL_CLK_SPDIF_SEL		7082#define IMX6SLL_CLK_ECSPI_SEL		7183#define IMX6SLL_CLK_UART_SEL		7284#define IMX6SLL_CLK_ARM			7385#define IMX6SLL_CLK_PERIPH		7486#define IMX6SLL_CLK_PERIPH2		7587#define IMX6SLL_CLK_PERIPH2_CLK2	7688#define IMX6SLL_CLK_PERIPH_CLK2		7789#define IMX6SLL_CLK_MMDC_PODF		7890#define IMX6SLL_CLK_AXI_PODF		7991#define IMX6SLL_CLK_AHB			8092#define IMX6SLL_CLK_IPG			8193#define IMX6SLL_CLK_PERCLK		8294#define IMX6SLL_CLK_USDHC1_PODF		8395#define IMX6SLL_CLK_USDHC2_PODF		8496#define IMX6SLL_CLK_USDHC3_PODF		8597#define IMX6SLL_CLK_SSI1_PRED		8698#define IMX6SLL_CLK_SSI2_PRED		8799#define IMX6SLL_CLK_SSI3_PRED		88100#define IMX6SLL_CLK_SSI1_PODF		89101#define IMX6SLL_CLK_SSI2_PODF		90102#define IMX6SLL_CLK_SSI3_PODF		91103#define IMX6SLL_CLK_PXP_PODF		92104#define IMX6SLL_CLK_LCDIF_PRED		93105#define IMX6SLL_CLK_LCDIF_PODF		94106#define IMX6SLL_CLK_EPDC_SEL		95107#define IMX6SLL_CLK_EPDC_PODF		96108#define IMX6SLL_CLK_SPDIF_PRED		97109#define IMX6SLL_CLK_SPDIF_PODF		98110#define IMX6SLL_CLK_ECSPI_PODF		99111#define IMX6SLL_CLK_UART_PODF		100112 113/* CCGR 0 */114#define IMX6SLL_CLK_AIPSTZ1		101115#define IMX6SLL_CLK_AIPSTZ2		102116#define IMX6SLL_CLK_DCP			103117#define IMX6SLL_CLK_UART2_IPG		104118#define IMX6SLL_CLK_UART2_SERIAL	105119 120/* CCGR 1 */121#define IMX6SLL_CLK_ECSPI1		106122#define IMX6SLL_CLK_ECSPI2		107123#define IMX6SLL_CLK_ECSPI3		108124#define IMX6SLL_CLK_ECSPI4		109125#define IMX6SLL_CLK_UART3_IPG		110126#define IMX6SLL_CLK_UART3_SERIAL	111127#define IMX6SLL_CLK_UART4_IPG		112128#define IMX6SLL_CLK_UART4_SERIAL	113129#define IMX6SLL_CLK_EPIT1		114130#define IMX6SLL_CLK_EPIT2		115131#define IMX6SLL_CLK_GPT_BUS		116132#define IMX6SLL_CLK_GPT_SERIAL		117133 134/* CCGR2 */135#define IMX6SLL_CLK_CSI			118136#define IMX6SLL_CLK_I2C1		119137#define IMX6SLL_CLK_I2C2		120138#define IMX6SLL_CLK_I2C3		121139#define IMX6SLL_CLK_OCOTP		122140#define IMX6SLL_CLK_LCDIF_APB		123141#define IMX6SLL_CLK_PXP			124142 143/* CCGR3 */144#define IMX6SLL_CLK_UART5_IPG		125145#define IMX6SLL_CLK_UART5_SERIAL	126146#define IMX6SLL_CLK_EPDC_AXI		127147#define IMX6SLL_CLK_EPDC_PIX		128148#define IMX6SLL_CLK_LCDIF_PIX		129149#define IMX6SLL_CLK_WDOG1		130150#define IMX6SLL_CLK_MMDC_P0_FAST	131151#define IMX6SLL_CLK_MMDC_P0_IPG		132152#define IMX6SLL_CLK_OCRAM		133153 154/* CCGR4 */155#define IMX6SLL_CLK_PWM1		134156#define IMX6SLL_CLK_PWM2		135157#define IMX6SLL_CLK_PWM3		136158#define IMX6SLL_CLK_PWM4		137159 160/* CCGR 5 */161#define IMX6SLL_CLK_ROM			138162#define IMX6SLL_CLK_SDMA		139163#define IMX6SLL_CLK_KPP			140164#define IMX6SLL_CLK_WDOG2		141165#define IMX6SLL_CLK_SPBA		142166#define IMX6SLL_CLK_SPDIF		143167#define IMX6SLL_CLK_SPDIF_GCLK		144168#define IMX6SLL_CLK_SSI1		145169#define IMX6SLL_CLK_SSI1_IPG		146170#define IMX6SLL_CLK_SSI2		147171#define IMX6SLL_CLK_SSI2_IPG		148172#define IMX6SLL_CLK_SSI3		149173#define IMX6SLL_CLK_SSI3_IPG		150174#define IMX6SLL_CLK_UART1_IPG		151175#define IMX6SLL_CLK_UART1_SERIAL	152176 177/* CCGR 6 */178#define IMX6SLL_CLK_USBOH3		153179#define IMX6SLL_CLK_USDHC1		154180#define IMX6SLL_CLK_USDHC2		155181#define IMX6SLL_CLK_USDHC3		156182 183#define IMX6SLL_CLK_IPP_DI0		157184#define IMX6SLL_CLK_IPP_DI1		158185#define IMX6SLL_CLK_LDB_DI0_SEL		159186#define IMX6SLL_CLK_LDB_DI0_DIV_3_5	160187#define IMX6SLL_CLK_LDB_DI0_DIV_7	161188#define IMX6SLL_CLK_LDB_DI0_DIV_SEL	162189#define IMX6SLL_CLK_LDB_DI0		163190#define IMX6SLL_CLK_LDB_DI1_SEL		164191#define IMX6SLL_CLK_LDB_DI1_DIV_3_5	165192#define IMX6SLL_CLK_LDB_DI1_DIV_7	166193#define IMX6SLL_CLK_LDB_DI1_DIV_SEL	167194#define IMX6SLL_CLK_LDB_DI1		168195#define IMX6SLL_CLK_EXTERN_AUDIO_SEL    169196#define IMX6SLL_CLK_EXTERN_AUDIO_PRED   170197#define IMX6SLL_CLK_EXTERN_AUDIO_PODF   171198#define IMX6SLL_CLK_EXTERN_AUDIO        172199 200#define IMX6SLL_CLK_GPIO1               173201#define IMX6SLL_CLK_GPIO2               174202#define IMX6SLL_CLK_GPIO3               175203#define IMX6SLL_CLK_GPIO4               176204#define IMX6SLL_CLK_GPIO5               177205#define IMX6SLL_CLK_GPIO6               178206#define IMX6SLL_CLK_MMDC_P1_IPG		179207 208#define IMX6SLL_CLK_END			180209 210#endif /* __DT_BINDINGS_CLOCK_IMX6SLL_H */211