287 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright 2017-2018 NXP4 */5 6#ifndef __DT_BINDINGS_CLOCK_IMX8MM_H7#define __DT_BINDINGS_CLOCK_IMX8MM_H8 9#define IMX8MM_CLK_DUMMY 010#define IMX8MM_CLK_32K 111#define IMX8MM_CLK_24M 212#define IMX8MM_OSC_HDMI_CLK 313#define IMX8MM_CLK_EXT1 414#define IMX8MM_CLK_EXT2 515#define IMX8MM_CLK_EXT3 616#define IMX8MM_CLK_EXT4 717#define IMX8MM_AUDIO_PLL1_REF_SEL 818#define IMX8MM_AUDIO_PLL2_REF_SEL 919#define IMX8MM_VIDEO_PLL1_REF_SEL 1020#define IMX8MM_DRAM_PLL_REF_SEL 1121#define IMX8MM_GPU_PLL_REF_SEL 1222#define IMX8MM_VPU_PLL_REF_SEL 1323#define IMX8MM_ARM_PLL_REF_SEL 1424#define IMX8MM_SYS_PLL1_REF_SEL 1525#define IMX8MM_SYS_PLL2_REF_SEL 1626#define IMX8MM_SYS_PLL3_REF_SEL 1727#define IMX8MM_AUDIO_PLL1 1828#define IMX8MM_AUDIO_PLL2 1929#define IMX8MM_VIDEO_PLL1 2030#define IMX8MM_DRAM_PLL 2131#define IMX8MM_GPU_PLL 2232#define IMX8MM_VPU_PLL 2333#define IMX8MM_ARM_PLL 2434#define IMX8MM_SYS_PLL1 2535#define IMX8MM_SYS_PLL2 2636#define IMX8MM_SYS_PLL3 2737#define IMX8MM_AUDIO_PLL1_BYPASS 2838#define IMX8MM_AUDIO_PLL2_BYPASS 2939#define IMX8MM_VIDEO_PLL1_BYPASS 3040#define IMX8MM_DRAM_PLL_BYPASS 3141#define IMX8MM_GPU_PLL_BYPASS 3242#define IMX8MM_VPU_PLL_BYPASS 3343#define IMX8MM_ARM_PLL_BYPASS 3444#define IMX8MM_SYS_PLL1_BYPASS 3545#define IMX8MM_SYS_PLL2_BYPASS 3646#define IMX8MM_SYS_PLL3_BYPASS 3747#define IMX8MM_AUDIO_PLL1_OUT 3848#define IMX8MM_AUDIO_PLL2_OUT 3949#define IMX8MM_VIDEO_PLL1_OUT 4050#define IMX8MM_DRAM_PLL_OUT 4151#define IMX8MM_GPU_PLL_OUT 4252#define IMX8MM_VPU_PLL_OUT 4353#define IMX8MM_ARM_PLL_OUT 4454#define IMX8MM_SYS_PLL1_OUT 4555#define IMX8MM_SYS_PLL2_OUT 4656#define IMX8MM_SYS_PLL3_OUT 4757#define IMX8MM_SYS_PLL1_40M 4858#define IMX8MM_SYS_PLL1_80M 4959#define IMX8MM_SYS_PLL1_100M 5060#define IMX8MM_SYS_PLL1_133M 5161#define IMX8MM_SYS_PLL1_160M 5262#define IMX8MM_SYS_PLL1_200M 5363#define IMX8MM_SYS_PLL1_266M 5464#define IMX8MM_SYS_PLL1_400M 5565#define IMX8MM_SYS_PLL1_800M 5666#define IMX8MM_SYS_PLL2_50M 5767#define IMX8MM_SYS_PLL2_100M 5868#define IMX8MM_SYS_PLL2_125M 5969#define IMX8MM_SYS_PLL2_166M 6070#define IMX8MM_SYS_PLL2_200M 6171#define IMX8MM_SYS_PLL2_250M 6272#define IMX8MM_SYS_PLL2_333M 6373#define IMX8MM_SYS_PLL2_500M 6474#define IMX8MM_SYS_PLL2_1000M 6575 76/* core */77#define IMX8MM_CLK_A53_SRC 6678#define IMX8MM_CLK_M4_SRC 6779#define IMX8MM_CLK_VPU_SRC 6880#define IMX8MM_CLK_GPU3D_SRC 6981#define IMX8MM_CLK_GPU2D_SRC 7082#define IMX8MM_CLK_A53_CG 7183#define IMX8MM_CLK_M4_CG 7284#define IMX8MM_CLK_VPU_CG 7385#define IMX8MM_CLK_GPU3D_CG 7486#define IMX8MM_CLK_GPU2D_CG 7587#define IMX8MM_CLK_A53_DIV 7688#define IMX8MM_CLK_M4_DIV 7789#define IMX8MM_CLK_VPU_DIV 7890#define IMX8MM_CLK_GPU3D_DIV 7991#define IMX8MM_CLK_GPU2D_DIV 8092 93/* bus */94#define IMX8MM_CLK_MAIN_AXI 8195#define IMX8MM_CLK_ENET_AXI 8296#define IMX8MM_CLK_NAND_USDHC_BUS 8397#define IMX8MM_CLK_VPU_BUS 8498#define IMX8MM_CLK_DISP_AXI 8599#define IMX8MM_CLK_DISP_APB 86100#define IMX8MM_CLK_DISP_RTRM 87101#define IMX8MM_CLK_USB_BUS 88102#define IMX8MM_CLK_GPU_AXI 89103#define IMX8MM_CLK_GPU_AHB 90104#define IMX8MM_CLK_NOC 91105#define IMX8MM_CLK_NOC_APB 92106 107#define IMX8MM_CLK_AHB 93108#define IMX8MM_CLK_AUDIO_AHB 94109#define IMX8MM_CLK_IPG_ROOT 95110#define IMX8MM_CLK_IPG_AUDIO_ROOT 96111 112#define IMX8MM_CLK_DRAM_ALT 97113#define IMX8MM_CLK_DRAM_APB 98114#define IMX8MM_CLK_VPU_G1 99115#define IMX8MM_CLK_VPU_G2 100116#define IMX8MM_CLK_DISP_DTRC 101117#define IMX8MM_CLK_DISP_DC8000 102118#define IMX8MM_CLK_PCIE1_CTRL 103119#define IMX8MM_CLK_PCIE1_PHY 104120#define IMX8MM_CLK_PCIE1_AUX 105121#define IMX8MM_CLK_DC_PIXEL 106122#define IMX8MM_CLK_LCDIF_PIXEL 107123#define IMX8MM_CLK_SAI1 108124#define IMX8MM_CLK_SAI2 109125#define IMX8MM_CLK_SAI3 110126#define IMX8MM_CLK_SAI4 111127#define IMX8MM_CLK_SAI5 112128#define IMX8MM_CLK_SAI6 113129#define IMX8MM_CLK_SPDIF1 114130#define IMX8MM_CLK_SPDIF2 115131#define IMX8MM_CLK_ENET_REF 116132#define IMX8MM_CLK_ENET_TIMER 117133#define IMX8MM_CLK_ENET_PHY_REF 118134#define IMX8MM_CLK_NAND 119135#define IMX8MM_CLK_QSPI 120136#define IMX8MM_CLK_USDHC1 121137#define IMX8MM_CLK_USDHC2 122138#define IMX8MM_CLK_I2C1 123139#define IMX8MM_CLK_I2C2 124140#define IMX8MM_CLK_I2C3 125141#define IMX8MM_CLK_I2C4 126142#define IMX8MM_CLK_UART1 127143#define IMX8MM_CLK_UART2 128144#define IMX8MM_CLK_UART3 129145#define IMX8MM_CLK_UART4 130146#define IMX8MM_CLK_USB_CORE_REF 131147#define IMX8MM_CLK_USB_PHY_REF 132148#define IMX8MM_CLK_ECSPI1 133149#define IMX8MM_CLK_ECSPI2 134150#define IMX8MM_CLK_PWM1 135151#define IMX8MM_CLK_PWM2 136152#define IMX8MM_CLK_PWM3 137153#define IMX8MM_CLK_PWM4 138154#define IMX8MM_CLK_GPT1 139155#define IMX8MM_CLK_WDOG 140156#define IMX8MM_CLK_WRCLK 141157#define IMX8MM_CLK_DSI_CORE 142158#define IMX8MM_CLK_DSI_PHY_REF 143159#define IMX8MM_CLK_DSI_DBI 144160#define IMX8MM_CLK_USDHC3 145161#define IMX8MM_CLK_CSI1_CORE 146162#define IMX8MM_CLK_CSI1_PHY_REF 147163#define IMX8MM_CLK_CSI1_ESC 148164#define IMX8MM_CLK_CSI2_CORE 149165#define IMX8MM_CLK_CSI2_PHY_REF 150166#define IMX8MM_CLK_CSI2_ESC 151167#define IMX8MM_CLK_PCIE2_CTRL 152168#define IMX8MM_CLK_PCIE2_PHY 153169#define IMX8MM_CLK_PCIE2_AUX 154170#define IMX8MM_CLK_ECSPI3 155171#define IMX8MM_CLK_PDM 156172#define IMX8MM_CLK_VPU_H1 157173#define IMX8MM_CLK_CLKO1 158174 175#define IMX8MM_CLK_ECSPI1_ROOT 159176#define IMX8MM_CLK_ECSPI2_ROOT 160177#define IMX8MM_CLK_ECSPI3_ROOT 161178#define IMX8MM_CLK_ENET1_ROOT 162179#define IMX8MM_CLK_GPT1_ROOT 163180#define IMX8MM_CLK_I2C1_ROOT 164181#define IMX8MM_CLK_I2C2_ROOT 165182#define IMX8MM_CLK_I2C3_ROOT 166183#define IMX8MM_CLK_I2C4_ROOT 167184#define IMX8MM_CLK_OCOTP_ROOT 168185#define IMX8MM_CLK_PCIE1_ROOT 169186#define IMX8MM_CLK_PWM1_ROOT 170187#define IMX8MM_CLK_PWM2_ROOT 171188#define IMX8MM_CLK_PWM3_ROOT 172189#define IMX8MM_CLK_PWM4_ROOT 173190#define IMX8MM_CLK_QSPI_ROOT 174191#define IMX8MM_CLK_NAND_ROOT 175192#define IMX8MM_CLK_SAI1_ROOT 176193#define IMX8MM_CLK_SAI1_IPG 177194#define IMX8MM_CLK_SAI2_ROOT 178195#define IMX8MM_CLK_SAI2_IPG 179196#define IMX8MM_CLK_SAI3_ROOT 180197#define IMX8MM_CLK_SAI3_IPG 181198#define IMX8MM_CLK_SAI4_ROOT 182199#define IMX8MM_CLK_SAI4_IPG 183200#define IMX8MM_CLK_SAI5_ROOT 184201#define IMX8MM_CLK_SAI5_IPG 185202#define IMX8MM_CLK_SAI6_ROOT 186203#define IMX8MM_CLK_SAI6_IPG 187204#define IMX8MM_CLK_UART1_ROOT 188205#define IMX8MM_CLK_UART2_ROOT 189206#define IMX8MM_CLK_UART3_ROOT 190207#define IMX8MM_CLK_UART4_ROOT 191208#define IMX8MM_CLK_USB1_CTRL_ROOT 192209#define IMX8MM_CLK_GPU3D_ROOT 193210#define IMX8MM_CLK_USDHC1_ROOT 194211#define IMX8MM_CLK_USDHC2_ROOT 195212#define IMX8MM_CLK_WDOG1_ROOT 196213#define IMX8MM_CLK_WDOG2_ROOT 197214#define IMX8MM_CLK_WDOG3_ROOT 198215#define IMX8MM_CLK_VPU_G1_ROOT 199216#define IMX8MM_CLK_GPU_BUS_ROOT 200217#define IMX8MM_CLK_VPU_H1_ROOT 201218#define IMX8MM_CLK_VPU_G2_ROOT 202219#define IMX8MM_CLK_PDM_ROOT 203220#define IMX8MM_CLK_DISP_ROOT 204221#define IMX8MM_CLK_DISP_AXI_ROOT 205222#define IMX8MM_CLK_DISP_APB_ROOT 206223#define IMX8MM_CLK_DISP_RTRM_ROOT 207224#define IMX8MM_CLK_USDHC3_ROOT 208225#define IMX8MM_CLK_TMU_ROOT 209226#define IMX8MM_CLK_VPU_DEC_ROOT 210227#define IMX8MM_CLK_SDMA1_ROOT 211228#define IMX8MM_CLK_SDMA2_ROOT 212229#define IMX8MM_CLK_SDMA3_ROOT 213230#define IMX8MM_CLK_GPT_3M 214231#define IMX8MM_CLK_ARM 215232#define IMX8MM_CLK_PDM_IPG 216233#define IMX8MM_CLK_GPU2D_ROOT 217234#define IMX8MM_CLK_MU_ROOT 218235#define IMX8MM_CLK_CSI1_ROOT 219236 237#define IMX8MM_CLK_DRAM_CORE 220238#define IMX8MM_CLK_DRAM_ALT_ROOT 221239 240#define IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK 222241 242#define IMX8MM_CLK_GPIO1_ROOT 223243#define IMX8MM_CLK_GPIO2_ROOT 224244#define IMX8MM_CLK_GPIO3_ROOT 225245#define IMX8MM_CLK_GPIO4_ROOT 226246#define IMX8MM_CLK_GPIO5_ROOT 227247 248#define IMX8MM_CLK_SNVS_ROOT 228249#define IMX8MM_CLK_GIC 229250 251#define IMX8MM_SYS_PLL1_40M_CG 230252#define IMX8MM_SYS_PLL1_80M_CG 231253#define IMX8MM_SYS_PLL1_100M_CG 232254#define IMX8MM_SYS_PLL1_133M_CG 233255#define IMX8MM_SYS_PLL1_160M_CG 234256#define IMX8MM_SYS_PLL1_200M_CG 235257#define IMX8MM_SYS_PLL1_266M_CG 236258#define IMX8MM_SYS_PLL1_400M_CG 237259#define IMX8MM_SYS_PLL2_50M_CG 238260#define IMX8MM_SYS_PLL2_100M_CG 239261#define IMX8MM_SYS_PLL2_125M_CG 240262#define IMX8MM_SYS_PLL2_166M_CG 241263#define IMX8MM_SYS_PLL2_200M_CG 242264#define IMX8MM_SYS_PLL2_250M_CG 243265#define IMX8MM_SYS_PLL2_333M_CG 244266#define IMX8MM_SYS_PLL2_500M_CG 245267 268#define IMX8MM_CLK_M4_CORE 246269#define IMX8MM_CLK_VPU_CORE 247270#define IMX8MM_CLK_GPU3D_CORE 248271#define IMX8MM_CLK_GPU2D_CORE 249272 273#define IMX8MM_CLK_CLKO2 250274 275#define IMX8MM_CLK_A53_CORE 251276 277#define IMX8MM_CLK_CLKOUT1_SEL 252278#define IMX8MM_CLK_CLKOUT1_DIV 253279#define IMX8MM_CLK_CLKOUT1 254280#define IMX8MM_CLK_CLKOUT2_SEL 255281#define IMX8MM_CLK_CLKOUT2_DIV 256282#define IMX8MM_CLK_CLKOUT2 257283 284#define IMX8MM_CLK_END 258285 286#endif287