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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright 2016 Freescale Semiconductor, Inc.4 * Copyright 2017 NXP5 */6 7#ifndef __DT_BINDINGS_CLOCK_IMX8MQ_H8#define __DT_BINDINGS_CLOCK_IMX8MQ_H9 10#define IMX8MQ_CLK_DUMMY 011#define IMX8MQ_CLK_32K 112#define IMX8MQ_CLK_25M 213#define IMX8MQ_CLK_27M 314#define IMX8MQ_CLK_EXT1 415#define IMX8MQ_CLK_EXT2 516#define IMX8MQ_CLK_EXT3 617#define IMX8MQ_CLK_EXT4 718 19/* ANAMIX PLL clocks */20/* FRAC PLLs */21/* ARM PLL */22#define IMX8MQ_ARM_PLL_REF_SEL 823#define IMX8MQ_ARM_PLL_REF_DIV 924#define IMX8MQ_ARM_PLL 1025#define IMX8MQ_ARM_PLL_BYPASS 1126#define IMX8MQ_ARM_PLL_OUT 1227 28/* GPU PLL */29#define IMX8MQ_GPU_PLL_REF_SEL 1330#define IMX8MQ_GPU_PLL_REF_DIV 1431#define IMX8MQ_GPU_PLL 1532#define IMX8MQ_GPU_PLL_BYPASS 1633#define IMX8MQ_GPU_PLL_OUT 1734 35/* VPU PLL */36#define IMX8MQ_VPU_PLL_REF_SEL 1837#define IMX8MQ_VPU_PLL_REF_DIV 1938#define IMX8MQ_VPU_PLL 2039#define IMX8MQ_VPU_PLL_BYPASS 2140#define IMX8MQ_VPU_PLL_OUT 2241 42/* AUDIO PLL1 */43#define IMX8MQ_AUDIO_PLL1_REF_SEL 2344#define IMX8MQ_AUDIO_PLL1_REF_DIV 2445#define IMX8MQ_AUDIO_PLL1 2546#define IMX8MQ_AUDIO_PLL1_BYPASS 2647#define IMX8MQ_AUDIO_PLL1_OUT 2748 49/* AUDIO PLL2 */50#define IMX8MQ_AUDIO_PLL2_REF_SEL 2851#define IMX8MQ_AUDIO_PLL2_REF_DIV 2952#define IMX8MQ_AUDIO_PLL2 3053#define IMX8MQ_AUDIO_PLL2_BYPASS 3154#define IMX8MQ_AUDIO_PLL2_OUT 3255 56/* VIDEO PLL1 */57#define IMX8MQ_VIDEO_PLL1_REF_SEL 3358#define IMX8MQ_VIDEO_PLL1_REF_DIV 3459#define IMX8MQ_VIDEO_PLL1 3560#define IMX8MQ_VIDEO_PLL1_BYPASS 3661#define IMX8MQ_VIDEO_PLL1_OUT 3762 63/* SYS1 PLL */64#define IMX8MQ_SYS1_PLL1_REF_SEL 3865#define IMX8MQ_SYS1_PLL1_REF_DIV 3966#define IMX8MQ_SYS1_PLL1 4067#define IMX8MQ_SYS1_PLL1_OUT 4168#define IMX8MQ_SYS1_PLL1_OUT_DIV 4269#define IMX8MQ_SYS1_PLL2 4370#define IMX8MQ_SYS1_PLL2_DIV 4471#define IMX8MQ_SYS1_PLL2_OUT 4572 73/* SYS2 PLL */74#define IMX8MQ_SYS2_PLL1_REF_SEL 4675#define IMX8MQ_SYS2_PLL1_REF_DIV 4776#define IMX8MQ_SYS2_PLL1 4877#define IMX8MQ_SYS2_PLL1_OUT 4978#define IMX8MQ_SYS2_PLL1_OUT_DIV 5079#define IMX8MQ_SYS2_PLL2 5180#define IMX8MQ_SYS2_PLL2_DIV 5281#define IMX8MQ_SYS2_PLL2_OUT 5382 83/* SYS3 PLL */84#define IMX8MQ_SYS3_PLL1_REF_SEL 5485#define IMX8MQ_SYS3_PLL1_REF_DIV 5586#define IMX8MQ_SYS3_PLL1 5687#define IMX8MQ_SYS3_PLL1_OUT 5788#define IMX8MQ_SYS3_PLL1_OUT_DIV 5889#define IMX8MQ_SYS3_PLL2 5990#define IMX8MQ_SYS3_PLL2_DIV 6091#define IMX8MQ_SYS3_PLL2_OUT 6192 93/* DRAM PLL */94#define IMX8MQ_DRAM_PLL1_REF_SEL 6295#define IMX8MQ_DRAM_PLL1_REF_DIV 6396#define IMX8MQ_DRAM_PLL1 6497#define IMX8MQ_DRAM_PLL1_OUT 6598#define IMX8MQ_DRAM_PLL1_OUT_DIV 6699#define IMX8MQ_DRAM_PLL2 67100#define IMX8MQ_DRAM_PLL2_DIV 68101#define IMX8MQ_DRAM_PLL2_OUT 69102 103/* SYS PLL DIV */104#define IMX8MQ_SYS1_PLL_40M 70105#define IMX8MQ_SYS1_PLL_80M 71106#define IMX8MQ_SYS1_PLL_100M 72107#define IMX8MQ_SYS1_PLL_133M 73108#define IMX8MQ_SYS1_PLL_160M 74109#define IMX8MQ_SYS1_PLL_200M 75110#define IMX8MQ_SYS1_PLL_266M 76111#define IMX8MQ_SYS1_PLL_400M 77112#define IMX8MQ_SYS1_PLL_800M 78113 114#define IMX8MQ_SYS2_PLL_50M 79115#define IMX8MQ_SYS2_PLL_100M 80116#define IMX8MQ_SYS2_PLL_125M 81117#define IMX8MQ_SYS2_PLL_166M 82118#define IMX8MQ_SYS2_PLL_200M 83119#define IMX8MQ_SYS2_PLL_250M 84120#define IMX8MQ_SYS2_PLL_333M 85121#define IMX8MQ_SYS2_PLL_500M 86122#define IMX8MQ_SYS2_PLL_1000M 87123 124/* CCM ROOT clocks */125/* A53 */126#define IMX8MQ_CLK_A53_SRC 88127#define IMX8MQ_CLK_A53_CG 89128#define IMX8MQ_CLK_A53_DIV 90129/* M4 */130#define IMX8MQ_CLK_M4_SRC 91131#define IMX8MQ_CLK_M4_CG 92132#define IMX8MQ_CLK_M4_DIV 93133/* VPU */134#define IMX8MQ_CLK_VPU_SRC 94135#define IMX8MQ_CLK_VPU_CG 95136#define IMX8MQ_CLK_VPU_DIV 96137/* GPU CORE */138#define IMX8MQ_CLK_GPU_CORE_SRC 97139#define IMX8MQ_CLK_GPU_CORE_CG 98140#define IMX8MQ_CLK_GPU_CORE_DIV 99141/* GPU SHADER */142#define IMX8MQ_CLK_GPU_SHADER_SRC 100143#define IMX8MQ_CLK_GPU_SHADER_CG 101144#define IMX8MQ_CLK_GPU_SHADER_DIV 102145 146/* BUS TYPE */147/* MAIN AXI */148#define IMX8MQ_CLK_MAIN_AXI 103149/* ENET AXI */150#define IMX8MQ_CLK_ENET_AXI 104151/* NAND_USDHC_BUS */152#define IMX8MQ_CLK_NAND_USDHC_BUS 105153/* VPU BUS */154#define IMX8MQ_CLK_VPU_BUS 106155/* DISP_AXI */156#define IMX8MQ_CLK_DISP_AXI 107157/* DISP APB */158#define IMX8MQ_CLK_DISP_APB 108159/* DISP RTRM */160#define IMX8MQ_CLK_DISP_RTRM 109161/* USB_BUS */162#define IMX8MQ_CLK_USB_BUS 110163/* GPU_AXI */164#define IMX8MQ_CLK_GPU_AXI 111165/* GPU_AHB */166#define IMX8MQ_CLK_GPU_AHB 112167/* NOC */168#define IMX8MQ_CLK_NOC 113169/* NOC_APB */170#define IMX8MQ_CLK_NOC_APB 115171 172/* AHB */173#define IMX8MQ_CLK_AHB 116174/* AUDIO AHB */175#define IMX8MQ_CLK_AUDIO_AHB 117176 177/* DRAM_ALT */178#define IMX8MQ_CLK_DRAM_ALT 118179/* DRAM APB */180#define IMX8MQ_CLK_DRAM_APB 119181/* VPU_G1 */182#define IMX8MQ_CLK_VPU_G1 120183/* VPU_G2 */184#define IMX8MQ_CLK_VPU_G2 121185/* DISP_DTRC */186#define IMX8MQ_CLK_DISP_DTRC 122187/* DISP_DC8000 */188#define IMX8MQ_CLK_DISP_DC8000 123189/* PCIE_CTRL */190#define IMX8MQ_CLK_PCIE1_CTRL 124191/* PCIE_PHY */192#define IMX8MQ_CLK_PCIE1_PHY 125193/* PCIE_AUX */194#define IMX8MQ_CLK_PCIE1_AUX 126195/* DC_PIXEL */196#define IMX8MQ_CLK_DC_PIXEL 127197/* LCDIF_PIXEL */198#define IMX8MQ_CLK_LCDIF_PIXEL 128199/* SAI1~6 */200#define IMX8MQ_CLK_SAI1 129201 202#define IMX8MQ_CLK_SAI2 130203 204#define IMX8MQ_CLK_SAI3 131205 206#define IMX8MQ_CLK_SAI4 132207 208#define IMX8MQ_CLK_SAI5 133209 210#define IMX8MQ_CLK_SAI6 134211/* SPDIF1 */212#define IMX8MQ_CLK_SPDIF1 135213/* SPDIF2 */214#define IMX8MQ_CLK_SPDIF2 136215/* ENET_REF */216#define IMX8MQ_CLK_ENET_REF 137217/* ENET_TIMER */218#define IMX8MQ_CLK_ENET_TIMER 138219/* ENET_PHY */220#define IMX8MQ_CLK_ENET_PHY_REF 139221/* NAND */222#define IMX8MQ_CLK_NAND 140223/* QSPI */224#define IMX8MQ_CLK_QSPI 141225/* USDHC1 */226#define IMX8MQ_CLK_USDHC1 142227/* USDHC2 */228#define IMX8MQ_CLK_USDHC2 143229/* I2C1 */230#define IMX8MQ_CLK_I2C1 144231/* I2C2 */232#define IMX8MQ_CLK_I2C2 145233/* I2C3 */234#define IMX8MQ_CLK_I2C3 146235/* I2C4 */236#define IMX8MQ_CLK_I2C4 147237/* UART1 */238#define IMX8MQ_CLK_UART1 148239/* UART2 */240#define IMX8MQ_CLK_UART2 149241/* UART3 */242#define IMX8MQ_CLK_UART3 150243/* UART4 */244#define IMX8MQ_CLK_UART4 151245/* USB_CORE_REF */246#define IMX8MQ_CLK_USB_CORE_REF 152247/* USB_PHY_REF */248#define IMX8MQ_CLK_USB_PHY_REF 153249/* ECSPI1 */250#define IMX8MQ_CLK_ECSPI1 154251/* ECSPI2 */252#define IMX8MQ_CLK_ECSPI2 155253/* PWM1 */254#define IMX8MQ_CLK_PWM1 156255/* PWM2 */256#define IMX8MQ_CLK_PWM2 157257/* PWM3 */258#define IMX8MQ_CLK_PWM3 158259/* PWM4 */260#define IMX8MQ_CLK_PWM4 159261/* GPT1 */262#define IMX8MQ_CLK_GPT1 160263/* WDOG */264#define IMX8MQ_CLK_WDOG 161265/* WRCLK */266#define IMX8MQ_CLK_WRCLK 162267/* DSI_CORE */268#define IMX8MQ_CLK_DSI_CORE 163269/* DSI_PHY */270#define IMX8MQ_CLK_DSI_PHY_REF 164271/* DSI_DBI */272#define IMX8MQ_CLK_DSI_DBI 165273/*DSI_ESC */274#define IMX8MQ_CLK_DSI_ESC 166275/* CSI1_CORE */276#define IMX8MQ_CLK_CSI1_CORE 167277/* CSI1_PHY */278#define IMX8MQ_CLK_CSI1_PHY_REF 168279/* CSI_ESC */280#define IMX8MQ_CLK_CSI1_ESC 169281/* CSI2_CORE */282#define IMX8MQ_CLK_CSI2_CORE 170283/* CSI2_PHY */284#define IMX8MQ_CLK_CSI2_PHY_REF 171285/* CSI2_ESC */286#define IMX8MQ_CLK_CSI2_ESC 172287/* PCIE2_CTRL */288#define IMX8MQ_CLK_PCIE2_CTRL 173289/* PCIE2_PHY */290#define IMX8MQ_CLK_PCIE2_PHY 174291/* PCIE2_AUX */292#define IMX8MQ_CLK_PCIE2_AUX 175293/* ECSPI3 */294#define IMX8MQ_CLK_ECSPI3 176295 296/* CCGR clocks */297#define IMX8MQ_CLK_A53_ROOT 177298#define IMX8MQ_CLK_DRAM_ROOT 178299#define IMX8MQ_CLK_ECSPI1_ROOT 179300#define IMX8MQ_CLK_ECSPI2_ROOT 180301#define IMX8MQ_CLK_ECSPI3_ROOT 181302#define IMX8MQ_CLK_ENET1_ROOT 182303#define IMX8MQ_CLK_GPT1_ROOT 183304#define IMX8MQ_CLK_I2C1_ROOT 184305#define IMX8MQ_CLK_I2C2_ROOT 185306#define IMX8MQ_CLK_I2C3_ROOT 186307#define IMX8MQ_CLK_I2C4_ROOT 187308#define IMX8MQ_CLK_M4_ROOT 188309#define IMX8MQ_CLK_PCIE1_ROOT 189310#define IMX8MQ_CLK_PCIE2_ROOT 190311#define IMX8MQ_CLK_PWM1_ROOT 191312#define IMX8MQ_CLK_PWM2_ROOT 192313#define IMX8MQ_CLK_PWM3_ROOT 193314#define IMX8MQ_CLK_PWM4_ROOT 194315#define IMX8MQ_CLK_QSPI_ROOT 195316#define IMX8MQ_CLK_SAI1_ROOT 196317#define IMX8MQ_CLK_SAI2_ROOT 197318#define IMX8MQ_CLK_SAI3_ROOT 198319#define IMX8MQ_CLK_SAI4_ROOT 199320#define IMX8MQ_CLK_SAI5_ROOT 200321#define IMX8MQ_CLK_SAI6_ROOT 201322#define IMX8MQ_CLK_UART1_ROOT 202323#define IMX8MQ_CLK_UART2_ROOT 203324#define IMX8MQ_CLK_UART3_ROOT 204325#define IMX8MQ_CLK_UART4_ROOT 205326#define IMX8MQ_CLK_USB1_CTRL_ROOT 206327#define IMX8MQ_CLK_USB2_CTRL_ROOT 207328#define IMX8MQ_CLK_USB1_PHY_ROOT 208329#define IMX8MQ_CLK_USB2_PHY_ROOT 209330#define IMX8MQ_CLK_USDHC1_ROOT 210331#define IMX8MQ_CLK_USDHC2_ROOT 211332#define IMX8MQ_CLK_WDOG1_ROOT 212333#define IMX8MQ_CLK_WDOG2_ROOT 213334#define IMX8MQ_CLK_WDOG3_ROOT 214335#define IMX8MQ_CLK_GPU_ROOT 215336#define IMX8MQ_CLK_HEVC_ROOT 216337#define IMX8MQ_CLK_AVC_ROOT 217338#define IMX8MQ_CLK_VP9_ROOT 218339#define IMX8MQ_CLK_HEVC_INTER_ROOT 219340#define IMX8MQ_CLK_DISP_ROOT 220341#define IMX8MQ_CLK_HDMI_ROOT 221342#define IMX8MQ_CLK_HDMI_PHY_ROOT 222343#define IMX8MQ_CLK_VPU_DEC_ROOT 223344#define IMX8MQ_CLK_CSI1_ROOT 224345#define IMX8MQ_CLK_CSI2_ROOT 225346#define IMX8MQ_CLK_RAWNAND_ROOT 226347#define IMX8MQ_CLK_SDMA1_ROOT 227348#define IMX8MQ_CLK_SDMA2_ROOT 228349#define IMX8MQ_CLK_VPU_G1_ROOT 229350#define IMX8MQ_CLK_VPU_G2_ROOT 230351 352/* SCCG PLL GATE */353#define IMX8MQ_SYS1_PLL_OUT 231354#define IMX8MQ_SYS2_PLL_OUT 232355#define IMX8MQ_SYS3_PLL_OUT 233356#define IMX8MQ_DRAM_PLL_OUT 234357 358#define IMX8MQ_GPT_3M_CLK 235359 360#define IMX8MQ_CLK_IPG_ROOT 236361#define IMX8MQ_CLK_IPG_AUDIO_ROOT 237362#define IMX8MQ_CLK_SAI1_IPG 238363#define IMX8MQ_CLK_SAI2_IPG 239364#define IMX8MQ_CLK_SAI3_IPG 240365#define IMX8MQ_CLK_SAI4_IPG 241366#define IMX8MQ_CLK_SAI5_IPG 242367#define IMX8MQ_CLK_SAI6_IPG 243368 369/* DSI AHB/IPG clocks */370/* rxesc clock */371#define IMX8MQ_CLK_DSI_AHB 244372/* txesc clock */373#define IMX8MQ_CLK_DSI_IPG_DIV 245374 375#define IMX8MQ_CLK_TMU_ROOT 246376 377/* Display root clocks */378#define IMX8MQ_CLK_DISP_AXI_ROOT 247379#define IMX8MQ_CLK_DISP_APB_ROOT 248380#define IMX8MQ_CLK_DISP_RTRM_ROOT 249381 382#define IMX8MQ_CLK_OCOTP_ROOT 250383 384#define IMX8MQ_CLK_DRAM_ALT_ROOT 251385#define IMX8MQ_CLK_DRAM_CORE 252386 387#define IMX8MQ_CLK_MU_ROOT 253388#define IMX8MQ_VIDEO2_PLL_OUT 254389 390#define IMX8MQ_CLK_CLKO2 255391 392#define IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK 256393 394#define IMX8MQ_CLK_CLKO1 257395#define IMX8MQ_CLK_ARM 258396 397#define IMX8MQ_CLK_GPIO1_ROOT 259398#define IMX8MQ_CLK_GPIO2_ROOT 260399#define IMX8MQ_CLK_GPIO3_ROOT 261400#define IMX8MQ_CLK_GPIO4_ROOT 262401#define IMX8MQ_CLK_GPIO5_ROOT 263402 403#define IMX8MQ_CLK_SNVS_ROOT 264404#define IMX8MQ_CLK_GIC 265405 406#define IMX8MQ_VIDEO2_PLL1_REF_SEL 266407 408#define IMX8MQ_CLK_GPU_CORE 285409#define IMX8MQ_CLK_GPU_SHADER 286410#define IMX8MQ_CLK_M4_CORE 287411#define IMX8MQ_CLK_VPU_CORE 288412 413#define IMX8MQ_CLK_A53_CORE 289414 415#define IMX8MQ_CLK_MON_AUDIO_PLL1_DIV 290416#define IMX8MQ_CLK_MON_AUDIO_PLL2_DIV 291417#define IMX8MQ_CLK_MON_VIDEO_PLL1_DIV 292418#define IMX8MQ_CLK_MON_GPU_PLL_DIV 293419#define IMX8MQ_CLK_MON_VPU_PLL_DIV 294420#define IMX8MQ_CLK_MON_ARM_PLL_DIV 295421#define IMX8MQ_CLK_MON_SYS_PLL1_DIV 296422#define IMX8MQ_CLK_MON_SYS_PLL2_DIV 297423#define IMX8MQ_CLK_MON_SYS_PLL3_DIV 298424#define IMX8MQ_CLK_MON_DRAM_PLL_DIV 299425#define IMX8MQ_CLK_MON_VIDEO_PLL2_DIV 300426#define IMX8MQ_CLK_MON_SEL 301427#define IMX8MQ_CLK_MON_CLK2_OUT 302428 429#define IMX8MQ_CLK_END 303430 431#endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */432