37 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding.4 */5 6#ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__7#define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__8 9#define JZ4725B_CLK_EXT 010#define JZ4725B_CLK_OSC32K 111#define JZ4725B_CLK_PLL 212#define JZ4725B_CLK_PLL_HALF 313#define JZ4725B_CLK_CCLK 414#define JZ4725B_CLK_HCLK 515#define JZ4725B_CLK_PCLK 616#define JZ4725B_CLK_MCLK 717#define JZ4725B_CLK_IPU 818#define JZ4725B_CLK_LCD 919#define JZ4725B_CLK_I2S 1020#define JZ4725B_CLK_SPI 1121#define JZ4725B_CLK_MMC_MUX 1222#define JZ4725B_CLK_UDC 1323#define JZ4725B_CLK_UART 1424#define JZ4725B_CLK_DMA 1525#define JZ4725B_CLK_ADC 1626#define JZ4725B_CLK_I2C 1727#define JZ4725B_CLK_AIC 1828#define JZ4725B_CLK_MMC0 1929#define JZ4725B_CLK_MMC1 2030#define JZ4725B_CLK_BCH 2131#define JZ4725B_CLK_TCU 2232#define JZ4725B_CLK_EXT512 2333#define JZ4725B_CLK_RTC 2434#define JZ4725B_CLK_UDC_PHY 2535 36#endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */37