47 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Author: Yinbo Zhu <zhuyinbo@loongson.cn>4 * Copyright (C) 2022-2023 Loongson Technology Corporation Limited5 */6 7#ifndef __DT_BINDINGS_CLOCK_LOONGSON2_H8#define __DT_BINDINGS_CLOCK_LOONGSON2_H9 10#define LOONGSON2_REF_100M 011#define LOONGSON2_NODE_PLL 112#define LOONGSON2_DDR_PLL 213#define LOONGSON2_DC_PLL 314#define LOONGSON2_PIX0_PLL 415#define LOONGSON2_PIX1_PLL 516#define LOONGSON2_NODE_CLK 617#define LOONGSON2_HDA_CLK 718#define LOONGSON2_GPU_CLK 819#define LOONGSON2_DDR_CLK 920#define LOONGSON2_GMAC_CLK 1021#define LOONGSON2_DC_CLK 1122#define LOONGSON2_APB_CLK 1223#define LOONGSON2_USB_CLK 1324#define LOONGSON2_SATA_CLK 1425#define LOONGSON2_PIX0_CLK 1526#define LOONGSON2_PIX1_CLK 1627#define LOONGSON2_BOOT_CLK 1728#define LOONGSON2_OUT0_GATE 1829#define LOONGSON2_GMAC_GATE 1930#define LOONGSON2_RIO_GATE 2031#define LOONGSON2_DC_GATE 2132#define LOONGSON2_GPU_GATE 2233#define LOONGSON2_DDR_GATE 2334#define LOONGSON2_HDA_GATE 2435#define LOONGSON2_NODE_GATE 2536#define LOONGSON2_EMMC_GATE 2637#define LOONGSON2_PIX0_GATE 2738#define LOONGSON2_PIX1_GATE 2839#define LOONGSON2_OUT0_CLK 2940#define LOONGSON2_RIO_CLK 3041#define LOONGSON2_EMMC_CLK 3142#define LOONGSON2_DES_CLK 3243#define LOONGSON2_I2S_CLK 3344#define LOONGSON2_MISC_CLK 3445 46#endif47