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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Meson8b clock tree IDs4 */5 6#ifndef __MESON8B_CLKC_H7#define __MESON8B_CLKC_H8 9#define CLKID_PLL_FIXED 210#define CLKID_PLL_VID 311#define CLKID_PLL_SYS 412#define CLKID_FCLK_DIV2 513#define CLKID_FCLK_DIV3 614#define CLKID_FCLK_DIV4 715#define CLKID_FCLK_DIV5 816#define CLKID_FCLK_DIV7 917#define CLKID_CLK81 1018#define CLKID_MALI 1119#define CLKID_CPUCLK 1220#define CLKID_ZERO 1321#define CLKID_MPEG_SEL 1422#define CLKID_MPEG_DIV 1523#define CLKID_DDR 1624#define CLKID_DOS 1725#define CLKID_ISA 1826#define CLKID_PL301 1927#define CLKID_PERIPHS 2028#define CLKID_SPICC 2129#define CLKID_I2C 2230#define CLKID_SAR_ADC 2331#define CLKID_SMART_CARD 2432#define CLKID_RNG0 2533#define CLKID_UART0 2634#define CLKID_SDHC 2735#define CLKID_STREAM 2836#define CLKID_ASYNC_FIFO 2937#define CLKID_SDIO 3038#define CLKID_ABUF 3139#define CLKID_HIU_IFACE 3240#define CLKID_ASSIST_MISC 3341#define CLKID_SPI 3442#define CLKID_I2S_SPDIF 3543#define CLKID_ETH 3644#define CLKID_DEMUX 3745#define CLKID_AIU_GLUE 3846#define CLKID_IEC958 3947#define CLKID_I2S_OUT 4048#define CLKID_AMCLK 4149#define CLKID_AIFIFO2 4250#define CLKID_MIXER 4351#define CLKID_MIXER_IFACE 4452#define CLKID_ADC 4553#define CLKID_BLKMV 4654#define CLKID_AIU 4755#define CLKID_UART1 4856#define CLKID_G2D 4957#define CLKID_USB0 5058#define CLKID_USB1 5159#define CLKID_RESET 5260#define CLKID_NAND 5361#define CLKID_DOS_PARSER 5462#define CLKID_USB 5563#define CLKID_VDIN1 5664#define CLKID_AHB_ARB0 5765#define CLKID_EFUSE 5866#define CLKID_BOOT_ROM 5967#define CLKID_AHB_DATA_BUS 6068#define CLKID_AHB_CTRL_BUS 6169#define CLKID_HDMI_INTR_SYNC 6270#define CLKID_HDMI_PCLK 6371#define CLKID_USB1_DDR_BRIDGE 6472#define CLKID_USB0_DDR_BRIDGE 6573#define CLKID_MMC_PCLK 6674#define CLKID_DVIN 6775#define CLKID_UART2 6876#define CLKID_SANA 6977#define CLKID_VPU_INTR 7078#define CLKID_SEC_AHB_AHB3_BRIDGE 7179#define CLKID_CLK81_A9 7280#define CLKID_VCLK2_VENCI0 7381#define CLKID_VCLK2_VENCI1 7482#define CLKID_VCLK2_VENCP0 7583#define CLKID_VCLK2_VENCP1 7684#define CLKID_GCLK_VENCI_INT 7785#define CLKID_GCLK_VENCP_INT 7886#define CLKID_DAC_CLK 7987#define CLKID_AOCLK_GATE 8088#define CLKID_IEC958_GATE 8189#define CLKID_ENC480P 8290#define CLKID_RNG1 8391#define CLKID_GCLK_VENCL_INT 8492#define CLKID_VCLK2_VENCLMCC 8593#define CLKID_VCLK2_VENCL 8694#define CLKID_VCLK2_OTHER 8795#define CLKID_EDP 8896#define CLKID_AO_MEDIA_CPU 8997#define CLKID_AO_AHB_SRAM 9098#define CLKID_AO_AHB_BUS 9199#define CLKID_AO_IFACE 92100#define CLKID_MPLL0 93101#define CLKID_MPLL1 94102#define CLKID_MPLL2 95103#define CLKID_MPLL0_DIV 96104#define CLKID_MPLL1_DIV 97105#define CLKID_MPLL2_DIV 98106#define CLKID_CPU_IN_SEL 99107#define CLKID_CPU_IN_DIV2 100108#define CLKID_CPU_IN_DIV3 101109#define CLKID_CPU_SCALE_DIV 102110#define CLKID_CPU_SCALE_OUT_SEL 103111#define CLKID_MPLL_PREDIV 104112#define CLKID_FCLK_DIV2_DIV 105113#define CLKID_FCLK_DIV3_DIV 106114#define CLKID_FCLK_DIV4_DIV 107115#define CLKID_FCLK_DIV5_DIV 108116#define CLKID_FCLK_DIV7_DIV 109117#define CLKID_NAND_SEL 110118#define CLKID_NAND_DIV 111119#define CLKID_NAND_CLK 112120#define CLKID_PLL_FIXED_DCO 113121#define CLKID_HDMI_PLL_DCO 114122#define CLKID_PLL_SYS_DCO 115123#define CLKID_CPU_CLK_DIV2 116124#define CLKID_CPU_CLK_DIV3 117125#define CLKID_CPU_CLK_DIV4 118126#define CLKID_CPU_CLK_DIV5 119127#define CLKID_CPU_CLK_DIV6 120128#define CLKID_CPU_CLK_DIV7 121129#define CLKID_CPU_CLK_DIV8 122130#define CLKID_APB_SEL 123131#define CLKID_APB 124132#define CLKID_PERIPH_SEL 125133#define CLKID_PERIPH 126134#define CLKID_AXI_SEL 127135#define CLKID_AXI 128136#define CLKID_L2_DRAM 130137#define CLKID_L2_DRAM_SEL 129138#define CLKID_HDMI_PLL_LVDS_OUT 131139#define CLKID_HDMI_PLL_HDMI_OUT 132140#define CLKID_VID_PLL_IN_SEL 133141#define CLKID_VID_PLL_IN_EN 134142#define CLKID_VID_PLL_PRE_DIV 135143#define CLKID_VID_PLL_POST_DIV 136144#define CLKID_VID_PLL_FINAL_DIV 137145#define CLKID_VCLK_IN_SEL 138146#define CLKID_VCLK_IN_EN 139147#define CLKID_VCLK_DIV1 140148#define CLKID_VCLK_DIV2_DIV 141149#define CLKID_VCLK_DIV2 142150#define CLKID_VCLK_DIV4_DIV 143151#define CLKID_VCLK_DIV4 144152#define CLKID_VCLK_DIV6_DIV 145153#define CLKID_VCLK_DIV6 146154#define CLKID_VCLK_DIV12_DIV 147155#define CLKID_VCLK_DIV12 148156#define CLKID_VCLK2_IN_SEL 149157#define CLKID_VCLK2_IN_EN 150158#define CLKID_VCLK2_DIV1 151159#define CLKID_VCLK2_DIV2_DIV 152160#define CLKID_VCLK2_DIV2 153161#define CLKID_VCLK2_DIV4_DIV 154162#define CLKID_VCLK2_DIV4 155163#define CLKID_VCLK2_DIV6_DIV 156164#define CLKID_VCLK2_DIV6 157165#define CLKID_VCLK2_DIV12_DIV 158166#define CLKID_VCLK2_DIV12 159167#define CLKID_CTS_ENCT_SEL 160168#define CLKID_CTS_ENCT 161169#define CLKID_CTS_ENCP_SEL 162170#define CLKID_CTS_ENCP 163171#define CLKID_CTS_ENCI_SEL 164172#define CLKID_CTS_ENCI 165173#define CLKID_HDMI_TX_PIXEL_SEL 166174#define CLKID_HDMI_TX_PIXEL 167175#define CLKID_CTS_ENCL_SEL 168176#define CLKID_CTS_ENCL 169177#define CLKID_CTS_VDAC0_SEL 170178#define CLKID_CTS_VDAC0 171179#define CLKID_HDMI_SYS_SEL 172180#define CLKID_HDMI_SYS_DIV 173181#define CLKID_HDMI_SYS 174182#define CLKID_MALI_0_SEL 175183#define CLKID_MALI_0_DIV 176184#define CLKID_MALI_0 177185#define CLKID_MALI_1_SEL 178186#define CLKID_MALI_1_DIV 179187#define CLKID_MALI_1 180188#define CLKID_GP_PLL_DCO 181189#define CLKID_GP_PLL 182190#define CLKID_VPU_0_SEL 183191#define CLKID_VPU_0_DIV 184192#define CLKID_VPU_0 185193#define CLKID_VPU_1_SEL 186194#define CLKID_VPU_1_DIV 187195#define CLKID_VPU_1 189196#define CLKID_VPU 190197#define CLKID_VDEC_1_SEL 191198#define CLKID_VDEC_1_1_DIV 192199#define CLKID_VDEC_1_1 193200#define CLKID_VDEC_1_2_DIV 194201#define CLKID_VDEC_1_2 195202#define CLKID_VDEC_1 196203#define CLKID_VDEC_HCODEC_SEL 197204#define CLKID_VDEC_HCODEC_DIV 198205#define CLKID_VDEC_HCODEC 199206#define CLKID_VDEC_2_SEL 200207#define CLKID_VDEC_2_DIV 201208#define CLKID_VDEC_2 202209#define CLKID_VDEC_HEVC_SEL 203210#define CLKID_VDEC_HEVC_DIV 204211#define CLKID_VDEC_HEVC_EN 205212#define CLKID_VDEC_HEVC 206213#define CLKID_CTS_AMCLK_SEL 207214#define CLKID_CTS_AMCLK_DIV 208215#define CLKID_CTS_AMCLK 209216#define CLKID_CTS_MCLK_I958_SEL 210217#define CLKID_CTS_MCLK_I958_DIV 211218#define CLKID_CTS_MCLK_I958 212219#define CLKID_CTS_I958 213220#define CLKID_VCLK_EN 214221#define CLKID_VCLK2_EN 215222#define CLKID_VID_PLL_LVDS_EN 216223#define CLKID_HDMI_PLL_DCO_IN 217224 225#endif /* __MESON8B_CLKC_H */226