57 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLK_SDM_DISP_CC_SDM845_H7#define _DT_BINDINGS_CLK_SDM_DISP_CC_SDM845_H8 9/* DISP_CC clock registers */10#define DISP_CC_MDSS_AHB_CLK 011#define DISP_CC_MDSS_AXI_CLK 112#define DISP_CC_MDSS_BYTE0_CLK 213#define DISP_CC_MDSS_BYTE0_CLK_SRC 314#define DISP_CC_MDSS_BYTE0_INTF_CLK 415#define DISP_CC_MDSS_BYTE1_CLK 516#define DISP_CC_MDSS_BYTE1_CLK_SRC 617#define DISP_CC_MDSS_BYTE1_INTF_CLK 718#define DISP_CC_MDSS_ESC0_CLK 819#define DISP_CC_MDSS_ESC0_CLK_SRC 920#define DISP_CC_MDSS_ESC1_CLK 1021#define DISP_CC_MDSS_ESC1_CLK_SRC 1122#define DISP_CC_MDSS_MDP_CLK 1223#define DISP_CC_MDSS_MDP_CLK_SRC 1324#define DISP_CC_MDSS_MDP_LUT_CLK 1425#define DISP_CC_MDSS_PCLK0_CLK 1526#define DISP_CC_MDSS_PCLK0_CLK_SRC 1627#define DISP_CC_MDSS_PCLK1_CLK 1728#define DISP_CC_MDSS_PCLK1_CLK_SRC 1829#define DISP_CC_MDSS_ROT_CLK 1930#define DISP_CC_MDSS_ROT_CLK_SRC 2031#define DISP_CC_MDSS_RSCC_AHB_CLK 2132#define DISP_CC_MDSS_RSCC_VSYNC_CLK 2233#define DISP_CC_MDSS_VSYNC_CLK 2334#define DISP_CC_MDSS_VSYNC_CLK_SRC 2435#define DISP_CC_PLL0 2536#define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 2637#define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 2738#define DISP_CC_MDSS_DP_AUX_CLK 2839#define DISP_CC_MDSS_DP_AUX_CLK_SRC 2940#define DISP_CC_MDSS_DP_CRYPTO_CLK 3041#define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 3142#define DISP_CC_MDSS_DP_LINK_CLK 3243#define DISP_CC_MDSS_DP_LINK_CLK_SRC 3344#define DISP_CC_MDSS_DP_LINK_INTF_CLK 3445#define DISP_CC_MDSS_DP_PIXEL1_CLK 3546#define DISP_CC_MDSS_DP_PIXEL1_CLK_SRC 3647#define DISP_CC_MDSS_DP_PIXEL_CLK 3748#define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 3849 50/* DISP_CC Reset */51#define DISP_CC_MDSS_RSCC_BCR 052 53/* DISP_CC GDSCR */54#define MDSS_GDSC 055 56#endif57