184 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2023, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_5018_H7#define _DT_BINDINGS_CLOCK_IPQ_GCC_5018_H8 9#define GPLL0_MAIN 010#define GPLL0 111#define GPLL2_MAIN 212#define GPLL2 313#define GPLL4_MAIN 414#define GPLL4 515#define UBI32_PLL_MAIN 616#define UBI32_PLL 717#define ADSS_PWM_CLK_SRC 818#define BLSP1_QUP1_I2C_APPS_CLK_SRC 919#define BLSP1_QUP1_SPI_APPS_CLK_SRC 1020#define BLSP1_QUP2_I2C_APPS_CLK_SRC 1121#define BLSP1_QUP2_SPI_APPS_CLK_SRC 1222#define BLSP1_QUP3_I2C_APPS_CLK_SRC 1323#define BLSP1_QUP3_SPI_APPS_CLK_SRC 1424#define BLSP1_UART1_APPS_CLK_SRC 1525#define BLSP1_UART2_APPS_CLK_SRC 1626#define CRYPTO_CLK_SRC 1727#define GCC_ADSS_PWM_CLK 1828#define GCC_BLSP1_AHB_CLK 1929#define GCC_BLSP1_QUP1_I2C_APPS_CLK 2030#define GCC_BLSP1_QUP1_SPI_APPS_CLK 2131#define GCC_BLSP1_QUP2_I2C_APPS_CLK 2232#define GCC_BLSP1_QUP2_SPI_APPS_CLK 2333#define GCC_BLSP1_QUP3_I2C_APPS_CLK 2434#define GCC_BLSP1_QUP3_SPI_APPS_CLK 2535#define GCC_BLSP1_UART1_APPS_CLK 2636#define GCC_BLSP1_UART2_APPS_CLK 2737#define GCC_BTSS_LPO_CLK 2838#define GCC_CMN_BLK_AHB_CLK 2939#define GCC_CMN_BLK_SYS_CLK 3040#define GCC_CRYPTO_AHB_CLK 3141#define GCC_CRYPTO_AXI_CLK 3242#define GCC_CRYPTO_CLK 3343#define GCC_CRYPTO_PPE_CLK 3444#define GCC_DCC_CLK 3545#define GCC_GEPHY_RX_CLK 3646#define GCC_GEPHY_TX_CLK 3747#define GCC_GMAC0_CFG_CLK 3848#define GCC_GMAC0_PTP_CLK 3949#define GCC_GMAC0_RX_CLK 4050#define GCC_GMAC0_SYS_CLK 4151#define GCC_GMAC0_TX_CLK 4252#define GCC_GMAC1_CFG_CLK 4353#define GCC_GMAC1_PTP_CLK 4454#define GCC_GMAC1_RX_CLK 4555#define GCC_GMAC1_SYS_CLK 4656#define GCC_GMAC1_TX_CLK 4757#define GCC_GP1_CLK 4858#define GCC_GP2_CLK 4959#define GCC_GP3_CLK 5060#define GCC_LPASS_CORE_AXIM_CLK 5161#define GCC_LPASS_SWAY_CLK 5262#define GCC_MDIO0_AHB_CLK 5363#define GCC_MDIO1_AHB_CLK 5464#define GCC_PCIE0_AHB_CLK 5565#define GCC_PCIE0_AUX_CLK 5666#define GCC_PCIE0_AXI_M_CLK 5767#define GCC_PCIE0_AXI_S_BRIDGE_CLK 5868#define GCC_PCIE0_AXI_S_CLK 5969#define GCC_PCIE0_PIPE_CLK 6070#define GCC_PCIE1_AHB_CLK 6171#define GCC_PCIE1_AUX_CLK 6272#define GCC_PCIE1_AXI_M_CLK 6373#define GCC_PCIE1_AXI_S_BRIDGE_CLK 6474#define GCC_PCIE1_AXI_S_CLK 6575#define GCC_PCIE1_PIPE_CLK 6676#define GCC_PRNG_AHB_CLK 6777#define GCC_Q6_AXIM_CLK 6878#define GCC_Q6_AXIM2_CLK 6979#define GCC_Q6_AXIS_CLK 7080#define GCC_Q6_AHB_CLK 7181#define GCC_Q6_AHB_S_CLK 7282#define GCC_Q6_TSCTR_1TO2_CLK 7383#define GCC_Q6SS_ATBM_CLK 7484#define GCC_Q6SS_PCLKDBG_CLK 7585#define GCC_Q6SS_TRIG_CLK 7686#define GCC_QDSS_AT_CLK 7787#define GCC_QDSS_CFG_AHB_CLK 7888#define GCC_QDSS_DAP_AHB_CLK 7989#define GCC_QDSS_DAP_CLK 8090#define GCC_QDSS_ETR_USB_CLK 8191#define GCC_QDSS_EUD_AT_CLK 8292#define GCC_QDSS_STM_CLK 8393#define GCC_QDSS_TRACECLKIN_CLK 8494#define GCC_QDSS_TSCTR_DIV8_CLK 8595#define GCC_QPIC_AHB_CLK 8696#define GCC_QPIC_CLK 8797#define GCC_QPIC_IO_MACRO_CLK 8898#define GCC_SDCC1_AHB_CLK 8999#define GCC_SDCC1_APPS_CLK 90100#define GCC_SLEEP_CLK_SRC 91101#define GCC_SNOC_GMAC0_AHB_CLK 92102#define GCC_SNOC_GMAC0_AXI_CLK 93103#define GCC_SNOC_GMAC1_AHB_CLK 94104#define GCC_SNOC_GMAC1_AXI_CLK 95105#define GCC_SNOC_LPASS_AXIM_CLK 96106#define GCC_SNOC_LPASS_SWAY_CLK 97107#define GCC_SNOC_UBI0_AXI_CLK 98108#define GCC_SYS_NOC_PCIE0_AXI_CLK 99109#define GCC_SYS_NOC_PCIE1_AXI_CLK 100110#define GCC_SYS_NOC_QDSS_STM_AXI_CLK 101111#define GCC_SYS_NOC_USB0_AXI_CLK 102112#define GCC_SYS_NOC_WCSS_AHB_CLK 103113#define GCC_UBI0_AXI_CLK 104114#define GCC_UBI0_CFG_CLK 105115#define GCC_UBI0_CORE_CLK 106116#define GCC_UBI0_DBG_CLK 107117#define GCC_UBI0_NC_AXI_CLK 108118#define GCC_UBI0_UTCM_CLK 109119#define GCC_UNIPHY_AHB_CLK 110120#define GCC_UNIPHY_RX_CLK 111121#define GCC_UNIPHY_SYS_CLK 112122#define GCC_UNIPHY_TX_CLK 113123#define GCC_USB0_AUX_CLK 114124#define GCC_USB0_EUD_AT_CLK 115125#define GCC_USB0_LFPS_CLK 116126#define GCC_USB0_MASTER_CLK 117127#define GCC_USB0_MOCK_UTMI_CLK 118128#define GCC_USB0_PHY_CFG_AHB_CLK 119129#define GCC_USB0_SLEEP_CLK 120130#define GCC_WCSS_ACMT_CLK 121131#define GCC_WCSS_AHB_S_CLK 122132#define GCC_WCSS_AXI_M_CLK 123133#define GCC_WCSS_AXI_S_CLK 124134#define GCC_WCSS_DBG_IFC_APB_BDG_CLK 125135#define GCC_WCSS_DBG_IFC_APB_CLK 126136#define GCC_WCSS_DBG_IFC_ATB_BDG_CLK 127137#define GCC_WCSS_DBG_IFC_ATB_CLK 128138#define GCC_WCSS_DBG_IFC_DAPBUS_BDG_CLK 129139#define GCC_WCSS_DBG_IFC_DAPBUS_CLK 130140#define GCC_WCSS_DBG_IFC_NTS_BDG_CLK 131141#define GCC_WCSS_DBG_IFC_NTS_CLK 132142#define GCC_WCSS_ECAHB_CLK 133143#define GCC_XO_CLK 134144#define GCC_XO_CLK_SRC 135145#define GMAC0_RX_CLK_SRC 136146#define GMAC0_TX_CLK_SRC 137147#define GMAC1_RX_CLK_SRC 138148#define GMAC1_TX_CLK_SRC 139149#define GMAC_CLK_SRC 140150#define GP1_CLK_SRC 141151#define GP2_CLK_SRC 142152#define GP3_CLK_SRC 143153#define LPASS_AXIM_CLK_SRC 144154#define LPASS_SWAY_CLK_SRC 145155#define PCIE0_AUX_CLK_SRC 146156#define PCIE0_AXI_CLK_SRC 147157#define PCIE1_AUX_CLK_SRC 148158#define PCIE1_AXI_CLK_SRC 149159#define PCNOC_BFDCD_CLK_SRC 150160#define Q6_AXI_CLK_SRC 151161#define QDSS_AT_CLK_SRC 152162#define QDSS_STM_CLK_SRC 153163#define QDSS_TSCTR_CLK_SRC 154164#define QDSS_TRACECLKIN_CLK_SRC 155165#define QPIC_IO_MACRO_CLK_SRC 156166#define SDCC1_APPS_CLK_SRC 157167#define SYSTEM_NOC_BFDCD_CLK_SRC 158168#define UBI0_AXI_CLK_SRC 159169#define UBI0_CORE_CLK_SRC 160170#define USB0_AUX_CLK_SRC 161171#define USB0_LFPS_CLK_SRC 162172#define USB0_MASTER_CLK_SRC 163173#define USB0_MOCK_UTMI_CLK_SRC 164174#define WCSS_AHB_CLK_SRC 165175#define PCIE0_PIPE_CLK_SRC 166176#define PCIE1_PIPE_CLK_SRC 167177#define USB0_PIPE_CLK_SRC 168178#define GCC_USB0_PIPE_CLK 169179#define GMAC0_RX_DIV_CLK_SRC 170180#define GMAC0_TX_DIV_CLK_SRC 171181#define GMAC1_RX_DIV_CLK_SRC 172182#define GMAC1_TX_DIV_CLK_SRC 173183#endif184