291 lines · c
1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2014, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLK_GCC_IPQ806X_H7#define _DT_BINDINGS_CLK_GCC_IPQ806X_H8 9#define AFAB_CLK_SRC 010#define QDSS_STM_CLK 111#define SCSS_A_CLK 212#define SCSS_H_CLK 313#define AFAB_CORE_CLK 414#define SCSS_XO_SRC_CLK 515#define AFAB_EBI1_CH0_A_CLK 616#define AFAB_EBI1_CH1_A_CLK 717#define AFAB_AXI_S0_FCLK 818#define AFAB_AXI_S1_FCLK 919#define AFAB_AXI_S2_FCLK 1020#define AFAB_AXI_S3_FCLK 1121#define AFAB_AXI_S4_FCLK 1222#define SFAB_CORE_CLK 1323#define SFAB_AXI_S0_FCLK 1424#define SFAB_AXI_S1_FCLK 1525#define SFAB_AXI_S2_FCLK 1626#define SFAB_AXI_S3_FCLK 1727#define SFAB_AXI_S4_FCLK 1828#define SFAB_AXI_S5_FCLK 1929#define SFAB_AHB_S0_FCLK 2030#define SFAB_AHB_S1_FCLK 2131#define SFAB_AHB_S2_FCLK 2232#define SFAB_AHB_S3_FCLK 2333#define SFAB_AHB_S4_FCLK 2434#define SFAB_AHB_S5_FCLK 2535#define SFAB_AHB_S6_FCLK 2636#define SFAB_AHB_S7_FCLK 2737#define QDSS_AT_CLK_SRC 2838#define QDSS_AT_CLK 2939#define QDSS_TRACECLKIN_CLK_SRC 3040#define QDSS_TRACECLKIN_CLK 3141#define QDSS_TSCTR_CLK_SRC 3242#define QDSS_TSCTR_CLK 3343#define SFAB_ADM0_M0_A_CLK 3444#define SFAB_ADM0_M1_A_CLK 3545#define SFAB_ADM0_M2_H_CLK 3646#define ADM0_CLK 3747#define ADM0_PBUS_CLK 3848#define IMEM0_A_CLK 3949#define QDSS_H_CLK 4050#define PCIE_A_CLK 4151#define PCIE_AUX_CLK 4252#define PCIE_H_CLK 4353#define PCIE_PHY_CLK 4454#define SFAB_CLK_SRC 4555#define SFAB_LPASS_Q6_A_CLK 4656#define SFAB_AFAB_M_A_CLK 4757#define AFAB_SFAB_M0_A_CLK 4858#define AFAB_SFAB_M1_A_CLK 4959#define SFAB_SATA_S_H_CLK 5060#define DFAB_CLK_SRC 5161#define DFAB_CLK 5262#define SFAB_DFAB_M_A_CLK 5363#define DFAB_SFAB_M_A_CLK 5464#define DFAB_SWAY0_H_CLK 5565#define DFAB_SWAY1_H_CLK 5666#define DFAB_ARB0_H_CLK 5767#define DFAB_ARB1_H_CLK 5868#define PPSS_H_CLK 5969#define PPSS_PROC_CLK 6070#define PPSS_TIMER0_CLK 6171#define PPSS_TIMER1_CLK 6272#define PMEM_A_CLK 6373#define DMA_BAM_H_CLK 6474#define SIC_H_CLK 6575#define SPS_TIC_H_CLK 6676#define CFPB_2X_CLK_SRC 6777#define CFPB_CLK 6878#define CFPB0_H_CLK 6979#define CFPB1_H_CLK 7080#define CFPB2_H_CLK 7181#define SFAB_CFPB_M_H_CLK 7282#define CFPB_MASTER_H_CLK 7383#define SFAB_CFPB_S_H_CLK 7484#define CFPB_SPLITTER_H_CLK 7585#define TSIF_H_CLK 7686#define TSIF_INACTIVITY_TIMERS_CLK 7787#define TSIF_REF_SRC 7888#define TSIF_REF_CLK 7989#define CE1_H_CLK 8090#define CE1_CORE_CLK 8191#define CE1_SLEEP_CLK 8292#define CE2_H_CLK 8393#define CE2_CORE_CLK 8494#define SFPB_H_CLK_SRC 8595#define SFPB_H_CLK 8696#define SFAB_SFPB_M_H_CLK 8797#define SFAB_SFPB_S_H_CLK 8898#define RPM_PROC_CLK 8999#define RPM_BUS_H_CLK 90100#define RPM_SLEEP_CLK 91101#define RPM_TIMER_CLK 92102#define RPM_MSG_RAM_H_CLK 93103#define PMIC_ARB0_H_CLK 94104#define PMIC_ARB1_H_CLK 95105#define PMIC_SSBI2_SRC 96106#define PMIC_SSBI2_CLK 97107#define SDC1_H_CLK 98108#define SDC2_H_CLK 99109#define SDC3_H_CLK 100110#define SDC4_H_CLK 101111#define SDC1_SRC 102112#define SDC1_CLK 103113#define SDC2_SRC 104114#define SDC2_CLK 105115#define SDC3_SRC 106116#define SDC3_CLK 107117#define SDC4_SRC 108118#define SDC4_CLK 109119#define USB_HS1_H_CLK 110120#define USB_HS1_XCVR_SRC 111121#define USB_HS1_XCVR_CLK 112122#define USB_HSIC_H_CLK 113123#define USB_HSIC_XCVR_SRC 114124#define USB_HSIC_XCVR_CLK 115125#define USB_HSIC_SYSTEM_CLK_SRC 116126#define USB_HSIC_SYSTEM_CLK 117127#define CFPB0_C0_H_CLK 118128#define CFPB0_D0_H_CLK 119129#define CFPB0_C1_H_CLK 120130#define CFPB0_D1_H_CLK 121131#define USB_FS1_H_CLK 122132#define USB_FS1_XCVR_SRC 123133#define USB_FS1_XCVR_CLK 124134#define USB_FS1_SYSTEM_CLK 125135#define GSBI_COMMON_SIM_SRC 126136#define GSBI1_H_CLK 127137#define GSBI2_H_CLK 128138#define GSBI3_H_CLK 129139#define GSBI4_H_CLK 130140#define GSBI5_H_CLK 131141#define GSBI6_H_CLK 132142#define GSBI7_H_CLK 133143#define GSBI1_QUP_SRC 134144#define GSBI1_QUP_CLK 135145#define GSBI2_QUP_SRC 136146#define GSBI2_QUP_CLK 137147#define GSBI3_QUP_SRC 138148#define GSBI3_QUP_CLK 139149#define GSBI4_QUP_SRC 140150#define GSBI4_QUP_CLK 141151#define GSBI5_QUP_SRC 142152#define GSBI5_QUP_CLK 143153#define GSBI6_QUP_SRC 144154#define GSBI6_QUP_CLK 145155#define GSBI7_QUP_SRC 146156#define GSBI7_QUP_CLK 147157#define GSBI1_UART_SRC 148158#define GSBI1_UART_CLK 149159#define GSBI2_UART_SRC 150160#define GSBI2_UART_CLK 151161#define GSBI3_UART_SRC 152162#define GSBI3_UART_CLK 153163#define GSBI4_UART_SRC 154164#define GSBI4_UART_CLK 155165#define GSBI5_UART_SRC 156166#define GSBI5_UART_CLK 157167#define GSBI6_UART_SRC 158168#define GSBI6_UART_CLK 159169#define GSBI7_UART_SRC 160170#define GSBI7_UART_CLK 161171#define GSBI1_SIM_CLK 162172#define GSBI2_SIM_CLK 163173#define GSBI3_SIM_CLK 164174#define GSBI4_SIM_CLK 165175#define GSBI5_SIM_CLK 166176#define GSBI6_SIM_CLK 167177#define GSBI7_SIM_CLK 168178#define USB_HSIC_HSIC_CLK_SRC 169179#define USB_HSIC_HSIC_CLK 170180#define USB_HSIC_HSIO_CAL_CLK 171181#define SPDM_CFG_H_CLK 172182#define SPDM_MSTR_H_CLK 173183#define SPDM_FF_CLK_SRC 174184#define SPDM_FF_CLK 175185#define SEC_CTRL_CLK 176186#define SEC_CTRL_ACC_CLK_SRC 177187#define SEC_CTRL_ACC_CLK 178188#define TLMM_H_CLK 179189#define TLMM_CLK 180190#define SATA_H_CLK 181191#define SATA_CLK_SRC 182192#define SATA_RXOOB_CLK 183193#define SATA_PMALIVE_CLK 184194#define SATA_PHY_REF_CLK 185195#define SATA_A_CLK 186196#define SATA_PHY_CFG_CLK 187197#define TSSC_CLK_SRC 188198#define TSSC_CLK 189199#define PDM_SRC 190200#define PDM_CLK 191201#define GP0_SRC 192202#define GP0_CLK 193203#define GP1_SRC 194204#define GP1_CLK 195205#define GP2_SRC 196206#define GP2_CLK 197207#define MPM_CLK 198208#define EBI1_CLK_SRC 199209#define EBI1_CH0_CLK 200210#define EBI1_CH1_CLK 201211#define EBI1_2X_CLK 202212#define EBI1_CH0_DQ_CLK 203213#define EBI1_CH1_DQ_CLK 204214#define EBI1_CH0_CA_CLK 205215#define EBI1_CH1_CA_CLK 206216#define EBI1_XO_CLK 207217#define SFAB_SMPSS_S_H_CLK 208218#define PRNG_SRC 209219#define PRNG_CLK 210220#define PXO_SRC 211221#define SPDM_CY_PORT0_CLK 212222#define SPDM_CY_PORT1_CLK 213223#define SPDM_CY_PORT2_CLK 214224#define SPDM_CY_PORT3_CLK 215225#define SPDM_CY_PORT4_CLK 216226#define SPDM_CY_PORT5_CLK 217227#define SPDM_CY_PORT6_CLK 218228#define SPDM_CY_PORT7_CLK 219229#define PLL0 220230#define PLL0_VOTE 221231#define PLL3 222232#define PLL3_VOTE 223233#define PLL4_VOTE 225234#define PLL8 226235#define PLL8_VOTE 227236#define PLL9 228237#define PLL10 229238#define PLL11 230239#define PLL12 231240#define PLL14 232241#define PLL14_VOTE 233242#define PLL18 234243#define CE5_A_CLK 235244#define CE5_H_CLK 236245#define CE5_CORE_CLK 237246#define CE3_SLEEP_CLK 238247#define SFAB_AHB_S8_FCLK 239248#define SPDM_CY_PORT8_CLK 246249#define PCIE_ALT_REF_SRC 247250#define PCIE_ALT_REF_CLK 248251#define PCIE_1_A_CLK 249252#define PCIE_1_AUX_CLK 250253#define PCIE_1_H_CLK 251254#define PCIE_1_PHY_CLK 252255#define PCIE_1_ALT_REF_SRC 253256#define PCIE_1_ALT_REF_CLK 254257#define PCIE_2_A_CLK 255258#define PCIE_2_AUX_CLK 256259#define PCIE_2_H_CLK 257260#define PCIE_2_PHY_CLK 258261#define PCIE_2_ALT_REF_SRC 259262#define PCIE_2_ALT_REF_CLK 260263#define EBI2_CLK 261264#define USB30_SLEEP_CLK 262265#define USB30_UTMI_SRC 263266#define USB30_0_UTMI_CLK 264267#define USB30_1_UTMI_CLK 265268#define USB30_MASTER_SRC 266269#define USB30_0_MASTER_CLK 267270#define USB30_1_MASTER_CLK 268271#define GMAC_CORE1_CLK_SRC 269272#define GMAC_CORE2_CLK_SRC 270273#define GMAC_CORE3_CLK_SRC 271274#define GMAC_CORE4_CLK_SRC 272275#define GMAC_CORE1_CLK 273276#define GMAC_CORE2_CLK 274277#define GMAC_CORE3_CLK 275278#define GMAC_CORE4_CLK 276279#define UBI32_CORE1_CLK_SRC 277280#define UBI32_CORE2_CLK_SRC 278281#define UBI32_CORE1_CLK 279282#define UBI32_CORE2_CLK 280283#define EBI2_AON_CLK 281284#define NSSTCM_CLK_SRC 282285#define NSSTCM_CLK 283286#define CE5_A_CLK_SRC 285287#define CE5_H_CLK_SRC 286288#define CE5_CORE_CLK_SRC 287289 290#endif291