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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2 3#ifndef _DT_BINDINGS_CLK_MSM_GCC_8917_H4#define _DT_BINDINGS_CLK_MSM_GCC_8917_H5 6/* Clocks */7#define APSS_AHB_CLK_SRC 08#define BLSP1_QUP2_I2C_APPS_CLK_SRC 19#define BLSP1_QUP2_SPI_APPS_CLK_SRC 210#define BLSP1_QUP3_I2C_APPS_CLK_SRC 311#define BLSP1_QUP3_SPI_APPS_CLK_SRC 412#define BLSP1_QUP4_I2C_APPS_CLK_SRC 513#define BLSP1_QUP4_SPI_APPS_CLK_SRC 614#define BLSP1_UART1_APPS_CLK_SRC 715#define BLSP1_UART2_APPS_CLK_SRC 816#define BLSP2_QUP1_I2C_APPS_CLK_SRC 917#define BLSP2_QUP1_SPI_APPS_CLK_SRC 1018#define BLSP2_QUP2_I2C_APPS_CLK_SRC 1119#define BLSP2_QUP2_SPI_APPS_CLK_SRC 1220#define BLSP2_QUP3_I2C_APPS_CLK_SRC 1321#define BLSP2_QUP3_SPI_APPS_CLK_SRC 1422#define BLSP2_UART1_APPS_CLK_SRC 1523#define BLSP2_UART2_APPS_CLK_SRC 1624#define BYTE0_CLK_SRC 1725#define CAMSS_GP0_CLK_SRC 1826#define CAMSS_GP1_CLK_SRC 1927#define CAMSS_TOP_AHB_CLK_SRC 2028#define CCI_CLK_SRC 2129#define CPP_CLK_SRC 2230#define CRYPTO_CLK_SRC 2331#define CSI0PHYTIMER_CLK_SRC 2432#define CSI0_CLK_SRC 2533#define CSI1PHYTIMER_CLK_SRC 2634#define CSI1_CLK_SRC 2735#define CSI2_CLK_SRC 2836#define ESC0_CLK_SRC 2937#define GCC_APSS_TCU_CLK 3038#define GCC_BIMC_GFX_CLK 3139#define GCC_BIMC_GPU_CLK 3240#define GCC_BLSP1_AHB_CLK 3341#define GCC_BLSP1_QUP2_I2C_APPS_CLK 3442#define GCC_BLSP1_QUP2_SPI_APPS_CLK 3543#define GCC_BLSP1_QUP3_I2C_APPS_CLK 3644#define GCC_BLSP1_QUP3_SPI_APPS_CLK 3745#define GCC_BLSP1_QUP4_I2C_APPS_CLK 3846#define GCC_BLSP1_QUP4_SPI_APPS_CLK 3947#define GCC_BLSP1_UART1_APPS_CLK 4048#define GCC_BLSP1_UART2_APPS_CLK 4149#define GCC_BLSP2_AHB_CLK 4250#define GCC_BLSP2_QUP1_I2C_APPS_CLK 4351#define GCC_BLSP2_QUP1_SPI_APPS_CLK 4452#define GCC_BLSP2_QUP2_I2C_APPS_CLK 4553#define GCC_BLSP2_QUP2_SPI_APPS_CLK 4654#define GCC_BLSP2_QUP3_I2C_APPS_CLK 4755#define GCC_BLSP2_QUP3_SPI_APPS_CLK 4856#define GCC_BLSP2_UART1_APPS_CLK 4957#define GCC_BLSP2_UART2_APPS_CLK 5058#define GCC_BOOT_ROM_AHB_CLK 5159#define GCC_CAMSS_AHB_CLK 5260#define GCC_CAMSS_CCI_AHB_CLK 5361#define GCC_CAMSS_CCI_CLK 5462#define GCC_CAMSS_CPP_AHB_CLK 5563#define GCC_CAMSS_CPP_CLK 5664#define GCC_CAMSS_CSI0PHYTIMER_CLK 5765#define GCC_CAMSS_CSI0PHY_CLK 5866#define GCC_CAMSS_CSI0PIX_CLK 5967#define GCC_CAMSS_CSI0RDI_CLK 6068#define GCC_CAMSS_CSI0_AHB_CLK 6169#define GCC_CAMSS_CSI0_CLK 6270#define GCC_CAMSS_CSI1PHYTIMER_CLK 6371#define GCC_CAMSS_CSI1PHY_CLK 6472#define GCC_CAMSS_CSI1PIX_CLK 6573#define GCC_CAMSS_CSI1RDI_CLK 6674#define GCC_CAMSS_CSI1_AHB_CLK 6775#define GCC_CAMSS_CSI1_CLK 6876#define GCC_CAMSS_CSI2PHY_CLK 6977#define GCC_CAMSS_CSI2PIX_CLK 7078#define GCC_CAMSS_CSI2RDI_CLK 7179#define GCC_CAMSS_CSI2_AHB_CLK 7280#define GCC_CAMSS_CSI2_CLK 7381#define GCC_CAMSS_CSI_VFE0_CLK 7482#define GCC_CAMSS_CSI_VFE1_CLK 7583#define GCC_CAMSS_GP0_CLK 7684#define GCC_CAMSS_GP1_CLK 7785#define GCC_CAMSS_ISPIF_AHB_CLK 7886#define GCC_CAMSS_JPEG0_CLK 7987#define GCC_CAMSS_JPEG_AHB_CLK 8088#define GCC_CAMSS_JPEG_AXI_CLK 8189#define GCC_CAMSS_MCLK0_CLK 8290#define GCC_CAMSS_MCLK1_CLK 8391#define GCC_CAMSS_MCLK2_CLK 8492#define GCC_CAMSS_MICRO_AHB_CLK 8593#define GCC_CAMSS_TOP_AHB_CLK 8694#define GCC_CAMSS_VFE0_AHB_CLK 8795#define GCC_CAMSS_VFE0_AXI_CLK 8896#define GCC_CAMSS_VFE0_CLK 8997#define GCC_CAMSS_VFE1_AHB_CLK 9098#define GCC_CAMSS_VFE1_AXI_CLK 9199#define GCC_CAMSS_VFE1_CLK 92100#define GCC_CPP_TBU_CLK 93101#define GCC_CRYPTO_AHB_CLK 94102#define GCC_CRYPTO_AXI_CLK 95103#define GCC_CRYPTO_CLK 96104#define GCC_DCC_CLK 97105#define GCC_GFX_TBU_CLK 98106#define GCC_GFX_TCU_CLK 99107#define GCC_GP1_CLK 100108#define GCC_GP2_CLK 101109#define GCC_GP3_CLK 102110#define GCC_GTCU_AHB_CLK 103111#define GCC_JPEG_TBU_CLK 104112#define GCC_MDP_TBU_CLK 105113#define GCC_MDSS_AHB_CLK 106114#define GCC_MDSS_AXI_CLK 107115#define GCC_MDSS_BYTE0_CLK 108116#define GCC_MDSS_ESC0_CLK 109117#define GCC_MDSS_MDP_CLK 110118#define GCC_MDSS_PCLK0_CLK 111119#define GCC_MDSS_VSYNC_CLK 112120#define GCC_MSS_CFG_AHB_CLK 113121#define GCC_MSS_Q6_BIMC_AXI_CLK 114122#define GCC_OXILI_AHB_CLK 115123#define GCC_OXILI_GFX3D_CLK 116124#define GCC_PDM2_CLK 117125#define GCC_PDM_AHB_CLK 118126#define GCC_PRNG_AHB_CLK 119127#define GCC_QDSS_DAP_CLK 120128#define GCC_SDCC1_AHB_CLK 121129#define GCC_SDCC1_APPS_CLK 122130#define GCC_SDCC1_ICE_CORE_CLK 123131#define GCC_SDCC2_AHB_CLK 124132#define GCC_SDCC2_APPS_CLK 125133#define GCC_SMMU_CFG_CLK 126134#define GCC_USB2A_PHY_SLEEP_CLK 127135#define GCC_USB_HS_AHB_CLK 128136#define GCC_USB_HS_PHY_CFG_AHB_CLK 129137#define GCC_USB_HS_SYSTEM_CLK 130138#define GCC_VENUS0_AHB_CLK 131139#define GCC_VENUS0_AXI_CLK 132140#define GCC_VENUS0_CORE0_VCODEC0_CLK 133141#define GCC_VENUS0_VCODEC0_CLK 134142#define GCC_VENUS_TBU_CLK 135143#define GCC_VFE1_TBU_CLK 136144#define GCC_VFE_TBU_CLK 137145#define GFX3D_CLK_SRC 138146#define GP1_CLK_SRC 139147#define GP2_CLK_SRC 140148#define GP3_CLK_SRC 141149#define GPLL0 142150#define GPLL0_EARLY 143151#define GPLL3 144152#define GPLL3_EARLY 145153#define GPLL4 146154#define GPLL4_EARLY 147155#define GPLL6 148156#define GPLL6_EARLY 149157#define JPEG0_CLK_SRC 150158#define MCLK0_CLK_SRC 151159#define MCLK1_CLK_SRC 152160#define MCLK2_CLK_SRC 153161#define MDP_CLK_SRC 154162#define PCLK0_CLK_SRC 155163#define PDM2_CLK_SRC 156164#define SDCC1_APPS_CLK_SRC 157165#define SDCC1_ICE_CORE_CLK_SRC 158166#define SDCC2_APPS_CLK_SRC 159167#define USB_HS_SYSTEM_CLK_SRC 160168#define VCODEC0_CLK_SRC 161169#define VFE0_CLK_SRC 162170#define VFE1_CLK_SRC 163171#define VSYNC_CLK_SRC 164172#define GPLL0_SLEEP_CLK_SRC 165173 174/* GCC block resets */175#define GCC_CAMSS_MICRO_BCR 0176#define GCC_MSS_BCR 1177#define GCC_QUSB2_PHY_BCR 2178#define GCC_USB_HS_BCR 3179#define GCC_USB2_HS_PHY_ONLY_BCR 4180 181/* GDSCs */182#define CPP_GDSC 0183#define JPEG_GDSC 1184#define MDSS_GDSC 2185#define OXILI_GX_GDSC 3186#define VENUS_CORE0_GDSC 4187#define VENUS_GDSC 5188#define VFE0_GDSC 6189#define VFE1_GDSC 7190 191#endif192