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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2016, The Linux Foundation. All rights reserved.4 */5 6 7#ifndef _DT_BINDINGS_CLK_MSM_GCC_8994_H8#define _DT_BINDINGS_CLK_MSM_GCC_8994_H9 10#define GPLL0_EARLY 011#define GPLL0 112#define GPLL4_EARLY 213#define GPLL4 314#define UFS_AXI_CLK_SRC 415#define USB30_MASTER_CLK_SRC 516#define BLSP1_QUP1_I2C_APPS_CLK_SRC 617#define BLSP1_QUP1_SPI_APPS_CLK_SRC 718#define BLSP1_QUP2_I2C_APPS_CLK_SRC 819#define BLSP1_QUP2_SPI_APPS_CLK_SRC 920#define BLSP1_QUP3_I2C_APPS_CLK_SRC 1021#define BLSP1_QUP3_SPI_APPS_CLK_SRC 1122#define BLSP1_QUP4_I2C_APPS_CLK_SRC 1223#define BLSP1_QUP4_SPI_APPS_CLK_SRC 1324#define BLSP1_QUP5_I2C_APPS_CLK_SRC 1425#define BLSP1_QUP5_SPI_APPS_CLK_SRC 1526#define BLSP1_QUP6_I2C_APPS_CLK_SRC 1627#define BLSP1_QUP6_SPI_APPS_CLK_SRC 1728#define BLSP1_UART1_APPS_CLK_SRC 1829#define BLSP1_UART2_APPS_CLK_SRC 1930#define BLSP1_UART3_APPS_CLK_SRC 2031#define BLSP1_UART4_APPS_CLK_SRC 2132#define BLSP1_UART5_APPS_CLK_SRC 2233#define BLSP1_UART6_APPS_CLK_SRC 2334#define BLSP2_QUP1_I2C_APPS_CLK_SRC 2435#define BLSP2_QUP1_SPI_APPS_CLK_SRC 2536#define BLSP2_QUP2_I2C_APPS_CLK_SRC 2637#define BLSP2_QUP2_SPI_APPS_CLK_SRC 2738#define BLSP2_QUP3_I2C_APPS_CLK_SRC 2839#define BLSP2_QUP3_SPI_APPS_CLK_SRC 2940#define BLSP2_QUP4_I2C_APPS_CLK_SRC 3041#define BLSP2_QUP4_SPI_APPS_CLK_SRC 3142#define BLSP2_QUP5_I2C_APPS_CLK_SRC 3243#define BLSP2_QUP5_SPI_APPS_CLK_SRC 3344#define BLSP2_QUP6_I2C_APPS_CLK_SRC 3445#define BLSP2_QUP6_SPI_APPS_CLK_SRC 3546#define BLSP2_UART1_APPS_CLK_SRC 3647#define BLSP2_UART2_APPS_CLK_SRC 3748#define BLSP2_UART3_APPS_CLK_SRC 3849#define BLSP2_UART4_APPS_CLK_SRC 3950#define BLSP2_UART5_APPS_CLK_SRC 4051#define BLSP2_UART6_APPS_CLK_SRC 4152#define GP1_CLK_SRC 4253#define GP2_CLK_SRC 4354#define GP3_CLK_SRC 4455#define PCIE_0_AUX_CLK_SRC 4556#define PCIE_0_PIPE_CLK_SRC 4657#define PCIE_1_AUX_CLK_SRC 4758#define PCIE_1_PIPE_CLK_SRC 4859#define PDM2_CLK_SRC 4960#define SDCC1_APPS_CLK_SRC 5061#define SDCC2_APPS_CLK_SRC 5162#define SDCC3_APPS_CLK_SRC 5263#define SDCC4_APPS_CLK_SRC 5364#define TSIF_REF_CLK_SRC 5465#define USB30_MOCK_UTMI_CLK_SRC 5566#define USB3_PHY_AUX_CLK_SRC 5667#define USB_HS_SYSTEM_CLK_SRC 5768#define GCC_BLSP1_AHB_CLK 5869#define GCC_BLSP1_QUP1_I2C_APPS_CLK 5970#define GCC_BLSP1_QUP1_SPI_APPS_CLK 6071#define GCC_BLSP1_QUP2_I2C_APPS_CLK 6172#define GCC_BLSP1_QUP2_SPI_APPS_CLK 6273#define GCC_BLSP1_QUP3_I2C_APPS_CLK 6374#define GCC_BLSP1_QUP3_SPI_APPS_CLK 6475#define GCC_BLSP1_QUP4_I2C_APPS_CLK 6576#define GCC_BLSP1_QUP4_SPI_APPS_CLK 6677#define GCC_BLSP1_QUP5_I2C_APPS_CLK 6778#define GCC_BLSP1_QUP5_SPI_APPS_CLK 6879#define GCC_BLSP1_QUP6_I2C_APPS_CLK 6980#define GCC_BLSP1_QUP6_SPI_APPS_CLK 7081#define GCC_BLSP1_UART1_APPS_CLK 7182#define GCC_BLSP1_UART2_APPS_CLK 7283#define GCC_BLSP1_UART3_APPS_CLK 7384#define GCC_BLSP1_UART4_APPS_CLK 7485#define GCC_BLSP1_UART5_APPS_CLK 7586#define GCC_BLSP1_UART6_APPS_CLK 7687#define GCC_BLSP2_AHB_CLK 7788#define GCC_BLSP2_QUP1_I2C_APPS_CLK 7889#define GCC_BLSP2_QUP1_SPI_APPS_CLK 7990#define GCC_BLSP2_QUP2_I2C_APPS_CLK 8091#define GCC_BLSP2_QUP2_SPI_APPS_CLK 8192#define GCC_BLSP2_QUP3_I2C_APPS_CLK 8293#define GCC_BLSP2_QUP3_SPI_APPS_CLK 8394#define GCC_BLSP2_QUP4_I2C_APPS_CLK 8495#define GCC_BLSP2_QUP4_SPI_APPS_CLK 8596#define GCC_BLSP2_QUP5_I2C_APPS_CLK 8697#define GCC_BLSP2_QUP5_SPI_APPS_CLK 8798#define GCC_BLSP2_QUP6_I2C_APPS_CLK 8899#define GCC_BLSP2_QUP6_SPI_APPS_CLK 89100#define GCC_BLSP2_UART1_APPS_CLK 90101#define GCC_BLSP2_UART2_APPS_CLK 91102#define GCC_BLSP2_UART3_APPS_CLK 92103#define GCC_BLSP2_UART4_APPS_CLK 93104#define GCC_BLSP2_UART5_APPS_CLK 94105#define GCC_BLSP2_UART6_APPS_CLK 95106#define GCC_GP1_CLK 96107#define GCC_GP2_CLK 97108#define GCC_GP3_CLK 98109#define GCC_PCIE_0_AUX_CLK 99110#define GCC_PCIE_0_PIPE_CLK 100111#define GCC_PCIE_1_AUX_CLK 101112#define GCC_PCIE_1_PIPE_CLK 102113#define GCC_PDM2_CLK 103114#define GCC_SDCC1_APPS_CLK 104115#define GCC_SDCC2_APPS_CLK 105116#define GCC_SDCC3_APPS_CLK 106117#define GCC_SDCC4_APPS_CLK 107118#define GCC_SYS_NOC_UFS_AXI_CLK 108119#define GCC_SYS_NOC_USB3_AXI_CLK 109120#define GCC_TSIF_REF_CLK 110121#define GCC_UFS_AXI_CLK 111122#define GCC_UFS_RX_CFG_CLK 112123#define GCC_UFS_TX_CFG_CLK 113124#define GCC_USB30_MASTER_CLK 114125#define GCC_USB30_MOCK_UTMI_CLK 115126#define GCC_USB3_PHY_AUX_CLK 116127#define GCC_USB_HS_SYSTEM_CLK 117128#define GCC_SDCC1_AHB_CLK 118129#define GCC_LPASS_Q6_AXI_CLK 119130#define GCC_MSS_Q6_BIMC_AXI_CLK 120131#define GCC_PCIE_0_CFG_AHB_CLK 121132#define GCC_PCIE_0_MSTR_AXI_CLK 122133#define GCC_PCIE_0_SLV_AXI_CLK 123134#define GCC_PCIE_1_CFG_AHB_CLK 124135#define GCC_PCIE_1_MSTR_AXI_CLK 125136#define GCC_PCIE_1_SLV_AXI_CLK 126137#define GCC_PDM_AHB_CLK 127138#define GCC_SDCC2_AHB_CLK 128139#define GCC_SDCC3_AHB_CLK 129140#define GCC_SDCC4_AHB_CLK 130141#define GCC_TSIF_AHB_CLK 131142#define GCC_UFS_AHB_CLK 132143#define GCC_UFS_RX_SYMBOL_0_CLK 133144#define GCC_UFS_RX_SYMBOL_1_CLK 134145#define GCC_UFS_TX_SYMBOL_0_CLK 135146#define GCC_UFS_TX_SYMBOL_1_CLK 136147#define GCC_USB2_HS_PHY_SLEEP_CLK 137148#define GCC_USB30_SLEEP_CLK 138149#define GCC_USB_HS_AHB_CLK 139150#define GCC_USB_PHY_CFG_AHB2PHY_CLK 140151#define CONFIG_NOC_CLK_SRC 141152#define PERIPH_NOC_CLK_SRC 142153#define SYSTEM_NOC_CLK_SRC 143154#define GPLL0_OUT_MMSSCC 144155#define GPLL0_OUT_MSSCC 145156#define PCIE_0_PHY_LDO 146157#define PCIE_1_PHY_LDO 147158#define UFS_PHY_LDO 148159#define USB_SS_PHY_LDO 149160#define GCC_BOOT_ROM_AHB_CLK 150161#define GCC_PRNG_AHB_CLK 151162#define GCC_USB3_PHY_PIPE_CLK 152163 164/* GDSCs */165#define PCIE_GDSC 0166#define PCIE_0_GDSC 1167#define PCIE_1_GDSC 2168#define USB30_GDSC 3169#define UFS_GDSC 4170 171/* Resets */172#define USB3_PHY_RESET 0173#define USB3PHY_PHY_RESET 1174#define PCIE_PHY_0_RESET 2175#define PCIE_PHY_1_RESET 3176#define QUSB2_PHY_RESET 4177#define MSS_RESET 5178 179#endif180