202 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SM6115_H7#define _DT_BINDINGS_CLK_QCOM_GCC_SM6115_H8 9/* GCC clocks */10#define GPLL0 011#define GPLL0_OUT_AUX2 112#define GPLL0_OUT_MAIN 213#define GPLL10 314#define GPLL10_OUT_MAIN 415#define GPLL11 516#define GPLL11_OUT_MAIN 617#define GPLL3 718#define GPLL4 819#define GPLL4_OUT_MAIN 920#define GPLL6 1021#define GPLL6_OUT_MAIN 1122#define GPLL7 1223#define GPLL7_OUT_MAIN 1324#define GPLL8 1425#define GPLL8_OUT_MAIN 1526#define GPLL9 1627#define GPLL9_OUT_MAIN 1728#define GCC_CAMSS_CSI0PHYTIMER_CLK 1829#define GCC_CAMSS_CSI0PHYTIMER_CLK_SRC 1930#define GCC_CAMSS_CSI1PHYTIMER_CLK 2031#define GCC_CAMSS_CSI1PHYTIMER_CLK_SRC 2132#define GCC_CAMSS_CSI2PHYTIMER_CLK 2233#define GCC_CAMSS_CSI2PHYTIMER_CLK_SRC 2334#define GCC_CAMSS_MCLK0_CLK 2435#define GCC_CAMSS_MCLK0_CLK_SRC 2536#define GCC_CAMSS_MCLK1_CLK 2637#define GCC_CAMSS_MCLK1_CLK_SRC 2738#define GCC_CAMSS_MCLK2_CLK 2839#define GCC_CAMSS_MCLK2_CLK_SRC 2940#define GCC_CAMSS_MCLK3_CLK 3041#define GCC_CAMSS_MCLK3_CLK_SRC 3142#define GCC_CAMSS_NRT_AXI_CLK 3243#define GCC_CAMSS_OPE_AHB_CLK 3344#define GCC_CAMSS_OPE_AHB_CLK_SRC 3445#define GCC_CAMSS_OPE_CLK 3546#define GCC_CAMSS_OPE_CLK_SRC 3647#define GCC_CAMSS_RT_AXI_CLK 3748#define GCC_CAMSS_TFE_0_CLK 3849#define GCC_CAMSS_TFE_0_CLK_SRC 3950#define GCC_CAMSS_TFE_0_CPHY_RX_CLK 4051#define GCC_CAMSS_TFE_0_CSID_CLK 4152#define GCC_CAMSS_TFE_0_CSID_CLK_SRC 4253#define GCC_CAMSS_TFE_1_CLK 4354#define GCC_CAMSS_TFE_1_CLK_SRC 4455#define GCC_CAMSS_TFE_1_CPHY_RX_CLK 4556#define GCC_CAMSS_TFE_1_CSID_CLK 4657#define GCC_CAMSS_TFE_1_CSID_CLK_SRC 4758#define GCC_CAMSS_TFE_2_CLK 4859#define GCC_CAMSS_TFE_2_CLK_SRC 4960#define GCC_CAMSS_TFE_2_CPHY_RX_CLK 5061#define GCC_CAMSS_TFE_2_CSID_CLK 5162#define GCC_CAMSS_TFE_2_CSID_CLK_SRC 5263#define GCC_CAMSS_TFE_CPHY_RX_CLK_SRC 5364#define GCC_CAMSS_TOP_AHB_CLK 5465#define GCC_CAMSS_TOP_AHB_CLK_SRC 5566#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK 5667#define GCC_CPUSS_AHB_CLK 5768#define GCC_CPUSS_GNOC_CLK 6069#define GCC_DISP_AHB_CLK 6170#define GCC_DISP_GPLL0_DIV_CLK_SRC 6271#define GCC_DISP_HF_AXI_CLK 6372#define GCC_DISP_THROTTLE_CORE_CLK 6473#define GCC_DISP_XO_CLK 6574#define GCC_GP1_CLK 6675#define GCC_GP1_CLK_SRC 6776#define GCC_GP2_CLK 6877#define GCC_GP2_CLK_SRC 6978#define GCC_GP3_CLK 7079#define GCC_GP3_CLK_SRC 7180#define GCC_GPU_CFG_AHB_CLK 7281#define GCC_GPU_GPLL0_CLK_SRC 7382#define GCC_GPU_GPLL0_DIV_CLK_SRC 7483#define GCC_GPU_IREF_CLK 7584#define GCC_GPU_MEMNOC_GFX_CLK 7685#define GCC_GPU_SNOC_DVM_GFX_CLK 7786#define GCC_GPU_THROTTLE_CORE_CLK 7887#define GCC_GPU_THROTTLE_XO_CLK 7988#define GCC_PDM2_CLK 8089#define GCC_PDM2_CLK_SRC 8190#define GCC_PDM_AHB_CLK 8291#define GCC_PDM_XO4_CLK 8392#define GCC_PRNG_AHB_CLK 8493#define GCC_QMIP_CAMERA_NRT_AHB_CLK 8594#define GCC_QMIP_CAMERA_RT_AHB_CLK 8695#define GCC_QMIP_DISP_AHB_CLK 8796#define GCC_QMIP_GPU_CFG_AHB_CLK 8897#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK 8998#define GCC_QUPV3_WRAP0_CORE_2X_CLK 9099#define GCC_QUPV3_WRAP0_CORE_CLK 91100#define GCC_QUPV3_WRAP0_S0_CLK 92101#define GCC_QUPV3_WRAP0_S0_CLK_SRC 93102#define GCC_QUPV3_WRAP0_S1_CLK 94103#define GCC_QUPV3_WRAP0_S1_CLK_SRC 95104#define GCC_QUPV3_WRAP0_S2_CLK 96105#define GCC_QUPV3_WRAP0_S2_CLK_SRC 97106#define GCC_QUPV3_WRAP0_S3_CLK 98107#define GCC_QUPV3_WRAP0_S3_CLK_SRC 99108#define GCC_QUPV3_WRAP0_S4_CLK 100109#define GCC_QUPV3_WRAP0_S4_CLK_SRC 101110#define GCC_QUPV3_WRAP0_S5_CLK 102111#define GCC_QUPV3_WRAP0_S5_CLK_SRC 103112#define GCC_QUPV3_WRAP_0_M_AHB_CLK 104113#define GCC_QUPV3_WRAP_0_S_AHB_CLK 105114#define GCC_SDCC1_AHB_CLK 106115#define GCC_SDCC1_APPS_CLK 107116#define GCC_SDCC1_APPS_CLK_SRC 108117#define GCC_SDCC1_ICE_CORE_CLK 109118#define GCC_SDCC1_ICE_CORE_CLK_SRC 110119#define GCC_SDCC2_AHB_CLK 111120#define GCC_SDCC2_APPS_CLK 112121#define GCC_SDCC2_APPS_CLK_SRC 113122#define GCC_SYS_NOC_CPUSS_AHB_CLK 114123#define GCC_SYS_NOC_UFS_PHY_AXI_CLK 115124#define GCC_SYS_NOC_USB3_PRIM_AXI_CLK 116125#define GCC_UFS_PHY_AHB_CLK 117126#define GCC_UFS_PHY_AXI_CLK 118127#define GCC_UFS_PHY_AXI_CLK_SRC 119128#define GCC_UFS_PHY_ICE_CORE_CLK 120129#define GCC_UFS_PHY_ICE_CORE_CLK_SRC 121130#define GCC_UFS_PHY_PHY_AUX_CLK 122131#define GCC_UFS_PHY_PHY_AUX_CLK_SRC 123132#define GCC_UFS_PHY_RX_SYMBOL_0_CLK 124133#define GCC_UFS_PHY_TX_SYMBOL_0_CLK 125134#define GCC_UFS_PHY_UNIPRO_CORE_CLK 126135#define GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC 127136#define GCC_USB30_PRIM_MASTER_CLK 128137#define GCC_USB30_PRIM_MASTER_CLK_SRC 129138#define GCC_USB30_PRIM_MOCK_UTMI_CLK 130139#define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC 131140#define GCC_USB30_PRIM_MOCK_UTMI_POSTDIV_CLK_SRC 132141#define GCC_USB30_PRIM_SLEEP_CLK 133142#define GCC_USB3_PRIM_CLKREF_CLK 134143#define GCC_USB3_PRIM_PHY_AUX_CLK_SRC 135144#define GCC_USB3_PRIM_PHY_COM_AUX_CLK 136145#define GCC_USB3_PRIM_PHY_PIPE_CLK 137146#define GCC_VCODEC0_AXI_CLK 138147#define GCC_VENUS_AHB_CLK 139148#define GCC_VENUS_CTL_AXI_CLK 140149#define GCC_VIDEO_AHB_CLK 141150#define GCC_VIDEO_AXI0_CLK 142151#define GCC_VIDEO_THROTTLE_CORE_CLK 143152#define GCC_VIDEO_VCODEC0_SYS_CLK 144153#define GCC_VIDEO_VENUS_CLK_SRC 145154#define GCC_VIDEO_VENUS_CTL_CLK 146155#define GCC_VIDEO_XO_CLK 147156#define GCC_AHB2PHY_CSI_CLK 148157#define GCC_AHB2PHY_USB_CLK 149158#define GCC_BIMC_GPU_AXI_CLK 150159#define GCC_BOOT_ROM_AHB_CLK 151160#define GCC_CAM_THROTTLE_NRT_CLK 152161#define GCC_CAM_THROTTLE_RT_CLK 153162#define GCC_CAMERA_AHB_CLK 154163#define GCC_CAMERA_XO_CLK 155164#define GCC_CAMSS_AXI_CLK 156165#define GCC_CAMSS_AXI_CLK_SRC 157166#define GCC_CAMSS_CAMNOC_ATB_CLK 158167#define GCC_CAMSS_CAMNOC_NTS_XO_CLK 159168#define GCC_CAMSS_CCI_0_CLK 160169#define GCC_CAMSS_CCI_CLK_SRC 161170#define GCC_CAMSS_CPHY_0_CLK 162171#define GCC_CAMSS_CPHY_1_CLK 163172#define GCC_CAMSS_CPHY_2_CLK 164173#define GCC_UFS_CLKREF_CLK 165174#define GCC_DISP_GPLL0_CLK_SRC 166175 176/* GCC resets */177#define GCC_QUSB2PHY_PRIM_BCR 0178#define GCC_QUSB2PHY_SEC_BCR 1179#define GCC_SDCC1_BCR 2180#define GCC_UFS_PHY_BCR 3181#define GCC_USB30_PRIM_BCR 4182#define GCC_USB_PHY_CFG_AHB2PHY_BCR 5183#define GCC_VCODEC0_BCR 6184#define GCC_VENUS_BCR 7185#define GCC_VIDEO_INTERFACE_BCR 8186#define GCC_USB3PHY_PHY_PRIM_SP0_BCR 9187#define GCC_USB3_PHY_PRIM_SP0_BCR 10188#define GCC_SDCC2_BCR 11189 190/* Indexes for GDSCs */191#define GCC_CAMSS_TOP_GDSC 0192#define GCC_UFS_PHY_GDSC 1193#define GCC_USB30_PRIM_GDSC 2194#define GCC_VCODEC0_GDSC 3195#define GCC_VENUS_GDSC 4196#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC 5197#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC 6198#define HLOS1_VOTE_MM_SNOC_MMU_TBU_RT_GDSC 7199#define HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC 8200 201#endif202