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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2021, Konrad Dybcio <konrad.dybcio@somainline.org>4 */5 6#ifndef _DT_BINDINGS_CLK_QCOM_GCC_SM6125_H7#define _DT_BINDINGS_CLK_QCOM_GCC_SM6125_H8 9#define GPLL0_OUT_AUX2				010#define GPLL0_OUT_MAIN				111#define GPLL6_OUT_MAIN				212#define GPLL7_OUT_MAIN				313#define GPLL8_OUT_MAIN				414#define GPLL9_OUT_MAIN				515#define GPLL0_OUT_EARLY				616#define GPLL3_OUT_EARLY				717#define GPLL4_OUT_MAIN				818#define GPLL5_OUT_MAIN				919#define GPLL6_OUT_EARLY				1020#define GPLL7_OUT_EARLY				1121#define GPLL8_OUT_EARLY				1222#define GPLL9_OUT_EARLY				1323#define GCC_AHB2PHY_CSI_CLK			1424#define GCC_AHB2PHY_USB_CLK			1525#define GCC_APC_VS_CLK				1626#define GCC_BOOT_ROM_AHB_CLK		1727#define GCC_CAMERA_AHB_CLK			1828#define GCC_CAMERA_XO_CLK			1929#define GCC_CAMSS_AHB_CLK_SRC		2030#define GCC_CAMSS_CCI_AHB_CLK		2131#define GCC_CAMSS_CCI_CLK			2232#define GCC_CAMSS_CCI_CLK_SRC			2333#define GCC_CAMSS_CPHY_CSID0_CLK		2434#define GCC_CAMSS_CPHY_CSID1_CLK		2535#define GCC_CAMSS_CPHY_CSID2_CLK		2636#define GCC_CAMSS_CPHY_CSID3_CLK		2737#define GCC_CAMSS_CPP_AHB_CLK			2838#define GCC_CAMSS_CPP_AXI_CLK			2939#define GCC_CAMSS_CPP_CLK			3040#define GCC_CAMSS_CPP_CLK_SRC			3141#define GCC_CAMSS_CPP_VBIF_AHB_CLK		3242#define GCC_CAMSS_CSI0_AHB_CLK			3343#define GCC_CAMSS_CSI0_CLK				3444#define GCC_CAMSS_CSI0_CLK_SRC			3545#define GCC_CAMSS_CSI0PHYTIMER_CLK		3646#define GCC_CAMSS_CSI0PHYTIMER_CLK_SRC	3747#define GCC_CAMSS_CSI0PIX_CLK			3848#define GCC_CAMSS_CSI0RDI_CLK			3949#define GCC_CAMSS_CSI1_AHB_CLK			4050#define GCC_CAMSS_CSI1_CLK				4151#define GCC_CAMSS_CSI1_CLK_SRC			4252#define GCC_CAMSS_CSI1PHYTIMER_CLK		4353#define GCC_CAMSS_CSI1PHYTIMER_CLK_SRC	4454#define GCC_CAMSS_CSI1PIX_CLK			4555#define GCC_CAMSS_CSI1RDI_CLK			4656#define GCC_CAMSS_CSI2_AHB_CLK			4757#define GCC_CAMSS_CSI2_CLK				4858#define GCC_CAMSS_CSI2_CLK_SRC			4959#define GCC_CAMSS_CSI2PHYTIMER_CLK		5060#define GCC_CAMSS_CSI2PHYTIMER_CLK_SRC	5161#define GCC_CAMSS_CSI2PIX_CLK			5262#define GCC_CAMSS_CSI2RDI_CLK			5363#define GCC_CAMSS_CSI3_AHB_CLK			5464#define GCC_CAMSS_CSI3_CLK				5565#define GCC_CAMSS_CSI3_CLK_SRC			5666#define GCC_CAMSS_CSI3PIX_CLK			5767#define GCC_CAMSS_CSI3RDI_CLK			5868#define GCC_CAMSS_CSI_VFE0_CLK			5969#define GCC_CAMSS_CSI_VFE1_CLK			6070#define GCC_CAMSS_CSIPHY0_CLK			6171#define GCC_CAMSS_CSIPHY1_CLK			6272#define GCC_CAMSS_CSIPHY2_CLK			6373#define GCC_CAMSS_CSIPHY_CLK_SRC		6474#define GCC_CAMSS_GP0_CLK				6575#define GCC_CAMSS_GP0_CLK_SRC			6676#define GCC_CAMSS_GP1_CLK				6777#define GCC_CAMSS_GP1_CLK_SRC			6878#define GCC_CAMSS_ISPIF_AHB_CLK			6979#define GCC_CAMSS_JPEG_AHB_CLK			7080#define GCC_CAMSS_JPEG_AXI_CLK			7181#define GCC_CAMSS_JPEG_CLK				7282#define GCC_CAMSS_JPEG_CLK_SRC			7383#define GCC_CAMSS_MCLK0_CLK				7484#define GCC_CAMSS_MCLK0_CLK_SRC			7585#define GCC_CAMSS_MCLK1_CLK				7686#define GCC_CAMSS_MCLK1_CLK_SRC			7787#define GCC_CAMSS_MCLK2_CLK				7888#define GCC_CAMSS_MCLK2_CLK_SRC			7989#define GCC_CAMSS_MCLK3_CLK				8090#define GCC_CAMSS_MCLK3_CLK_SRC			8191#define GCC_CAMSS_MICRO_AHB_CLK			8292#define GCC_CAMSS_THROTTLE_NRT_AXI_CLK	8393#define GCC_CAMSS_THROTTLE_RT_AXI_CLK	8494#define GCC_CAMSS_TOP_AHB_CLK			8595#define GCC_CAMSS_VFE0_AHB_CLK			8696#define GCC_CAMSS_VFE0_CLK				8797#define GCC_CAMSS_VFE0_CLK_SRC			8898#define GCC_CAMSS_VFE0_STREAM_CLK		8999#define GCC_CAMSS_VFE1_AHB_CLK			90100#define GCC_CAMSS_VFE1_CLK				91101#define GCC_CAMSS_VFE1_CLK_SRC			92102#define GCC_CAMSS_VFE1_STREAM_CLK		93103#define GCC_CAMSS_VFE_TSCTR_CLK			94104#define GCC_CAMSS_VFE_VBIF_AHB_CLK		95105#define GCC_CAMSS_VFE_VBIF_AXI_CLK		96106#define GCC_CE1_AHB_CLK					97107#define GCC_CE1_AXI_CLK					98108#define GCC_CE1_CLK						99109#define GCC_CFG_NOC_USB3_PRIM_AXI_CLK	100110#define GCC_CPUSS_GNOC_CLK				101111#define GCC_DISP_AHB_CLK				102112#define GCC_DISP_GPLL0_DIV_CLK_SRC		103113#define GCC_DISP_HF_AXI_CLK				104114#define GCC_DISP_THROTTLE_CORE_CLK		105115#define GCC_DISP_XO_CLK					106116#define GCC_GP1_CLK						107117#define GCC_GP1_CLK_SRC					108118#define GCC_GP2_CLK						109119#define GCC_GP2_CLK_SRC					110120#define GCC_GP3_CLK						111121#define GCC_GP3_CLK_SRC					112122#define GCC_GPU_CFG_AHB_CLK				113123#define GCC_GPU_GPLL0_CLK_SRC			114124#define GCC_GPU_GPLL0_DIV_CLK_SRC		115125#define GCC_GPU_MEMNOC_GFX_CLK			116126#define GCC_GPU_SNOC_DVM_GFX_CLK		117127#define GCC_GPU_THROTTLE_CORE_CLK		118128#define GCC_GPU_THROTTLE_XO_CLK			119129#define GCC_MSS_VS_CLK					120130#define GCC_PDM2_CLK					121131#define GCC_PDM2_CLK_SRC				122132#define GCC_PDM_AHB_CLK					123133#define GCC_PDM_XO4_CLK					124134#define GCC_PRNG_AHB_CLK				125135#define GCC_QMIP_CAMERA_NRT_AHB_CLK		126136#define GCC_QMIP_CAMERA_RT_AHB_CLK		127137#define GCC_QMIP_DISP_AHB_CLK			128138#define GCC_QMIP_GPU_CFG_AHB_CLK		129139#define GCC_QMIP_VIDEO_VCODEC_AHB_CLK	130140#define GCC_QUPV3_WRAP0_CORE_2X_CLK		131141#define GCC_QUPV3_WRAP0_CORE_CLK		132142#define GCC_QUPV3_WRAP0_S0_CLK			133143#define GCC_QUPV3_WRAP0_S0_CLK_SRC		134144#define GCC_QUPV3_WRAP0_S1_CLK			135145#define GCC_QUPV3_WRAP0_S1_CLK_SRC		136146#define GCC_QUPV3_WRAP0_S2_CLK			137147#define GCC_QUPV3_WRAP0_S2_CLK_SRC		138148#define GCC_QUPV3_WRAP0_S3_CLK			139149#define GCC_QUPV3_WRAP0_S3_CLK_SRC		140150#define GCC_QUPV3_WRAP0_S4_CLK			141151#define GCC_QUPV3_WRAP0_S4_CLK_SRC		142152#define GCC_QUPV3_WRAP0_S5_CLK			143153#define GCC_QUPV3_WRAP0_S5_CLK_SRC		144154#define GCC_QUPV3_WRAP1_CORE_2X_CLK		145155#define GCC_QUPV3_WRAP1_CORE_CLK		146156#define GCC_QUPV3_WRAP1_S0_CLK			147157#define GCC_QUPV3_WRAP1_S0_CLK_SRC		148158#define GCC_QUPV3_WRAP1_S1_CLK			149159#define GCC_QUPV3_WRAP1_S1_CLK_SRC		150160#define GCC_QUPV3_WRAP1_S2_CLK			151161#define GCC_QUPV3_WRAP1_S2_CLK_SRC		152162#define GCC_QUPV3_WRAP1_S3_CLK			153163#define GCC_QUPV3_WRAP1_S3_CLK_SRC		154164#define GCC_QUPV3_WRAP1_S4_CLK			155165#define GCC_QUPV3_WRAP1_S4_CLK_SRC		156166#define GCC_QUPV3_WRAP1_S5_CLK			157167#define GCC_QUPV3_WRAP1_S5_CLK_SRC		158168#define GCC_QUPV3_WRAP_0_M_AHB_CLK		159169#define GCC_QUPV3_WRAP_0_S_AHB_CLK		160170#define GCC_QUPV3_WRAP_1_M_AHB_CLK		161171#define GCC_QUPV3_WRAP_1_S_AHB_CLK		162172#define GCC_SDCC1_AHB_CLK				163173#define GCC_SDCC1_APPS_CLK				164174#define GCC_SDCC1_APPS_CLK_SRC			165175#define GCC_SDCC1_ICE_CORE_CLK			166176#define GCC_SDCC1_ICE_CORE_CLK_SRC		167177#define GCC_SDCC2_AHB_CLK				168178#define GCC_SDCC2_APPS_CLK				169179#define GCC_SDCC2_APPS_CLK_SRC			170180#define GCC_SYS_NOC_CPUSS_AHB_CLK		171181#define GCC_SYS_NOC_UFS_PHY_AXI_CLK		172182#define GCC_SYS_NOC_USB3_PRIM_AXI_CLK	173183#define GCC_UFS_PHY_AHB_CLK				174184#define GCC_UFS_PHY_AXI_CLK				175185#define GCC_UFS_PHY_AXI_CLK_SRC			176186#define GCC_UFS_PHY_ICE_CORE_CLK		177187#define GCC_UFS_PHY_ICE_CORE_CLK_SRC	178188#define GCC_UFS_PHY_PHY_AUX_CLK			179189#define GCC_UFS_PHY_PHY_AUX_CLK_SRC		180190#define GCC_UFS_PHY_RX_SYMBOL_0_CLK		181191#define GCC_UFS_PHY_TX_SYMBOL_0_CLK		182192#define GCC_UFS_PHY_UNIPRO_CORE_CLK		183193#define GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC	184194#define GCC_USB30_PRIM_MASTER_CLK		185195#define GCC_USB30_PRIM_MASTER_CLK_SRC	186196#define GCC_USB30_PRIM_MOCK_UTMI_CLK	187197#define GCC_USB30_PRIM_MOCK_UTMI_CLK_SRC	188198#define GCC_USB30_PRIM_SLEEP_CLK		189199#define GCC_USB3_PRIM_PHY_AUX_CLK_SRC	190200#define GCC_USB3_PRIM_PHY_COM_AUX_CLK	191201#define GCC_USB3_PRIM_PHY_PIPE_CLK		192202#define GCC_VDDA_VS_CLK					193203#define GCC_VDDCX_VS_CLK				194204#define GCC_VDDMX_VS_CLK				195205#define GCC_VIDEO_AHB_CLK				196206#define GCC_VIDEO_AXI0_CLK				197207#define GCC_VIDEO_THROTTLE_CORE_CLK		198208#define GCC_VIDEO_XO_CLK				199209#define GCC_VS_CTRL_AHB_CLK				200210#define GCC_VS_CTRL_CLK					201211#define GCC_VS_CTRL_CLK_SRC				202212#define GCC_VSENSOR_CLK_SRC				203213#define GCC_WCSS_VS_CLK					204214#define GCC_USB3_PRIM_CLKREF_CLK		205215#define GCC_SYS_NOC_COMPUTE_SF_AXI_CLK	206216#define GCC_BIMC_GPU_AXI_CLK			207217#define GCC_UFS_MEM_CLKREF_CLK			208218 219/* GDSCs */220#define USB30_PRIM_GDSC					0221#define UFS_PHY_GDSC					1222#define CAMSS_VFE0_GDSC					2223#define CAMSS_VFE1_GDSC					3224#define CAMSS_TOP_GDSC					4225#define CAM_CPP_GDSC					5226#define HLOS1_VOTE_TURING_MMU_TBU1_GDSC	6227#define HLOS1_VOTE_MM_SNOC_MMU_TBU_RT_GDSC	7228#define HLOS1_VOTE_MM_SNOC_MMU_TBU_NRT_GDSC	8229#define HLOS1_VOTE_TURING_MMU_TBU0_GDSC	9230 231#define GCC_QUSB2PHY_PRIM_BCR			0232#define GCC_QUSB2PHY_SEC_BCR			1233#define GCC_UFS_PHY_BCR				2234#define GCC_USB30_PRIM_BCR			3235#define GCC_USB_PHY_CFG_AHB2PHY_BCR		4236#define GCC_USB3_PHY_PRIM_SP0_BCR		5237#define GCC_USB3PHY_PHY_PRIM_SP0_BCR		6238#define GCC_CAMSS_MICRO_BCR			7239 240#endif241