224 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (c) 2018-2023 The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H7#define _DT_BINDINGS_CLOCK_IPQ_GCC_9574_H8 9#define GPLL0_MAIN 010#define GPLL0 111#define GPLL2_MAIN 212#define GPLL2 313#define GPLL4_MAIN 414#define GPLL4 515#define GCC_SLEEP_CLK_SRC 616#define APSS_AHB_CLK_SRC 717#define APSS_AXI_CLK_SRC 818#define BLSP1_QUP1_I2C_APPS_CLK_SRC 919#define BLSP1_QUP1_SPI_APPS_CLK_SRC 1020#define BLSP1_QUP2_I2C_APPS_CLK_SRC 1121#define BLSP1_QUP2_SPI_APPS_CLK_SRC 1222#define BLSP1_QUP3_I2C_APPS_CLK_SRC 1323#define BLSP1_QUP3_SPI_APPS_CLK_SRC 1424#define BLSP1_QUP4_I2C_APPS_CLK_SRC 1525#define BLSP1_QUP4_SPI_APPS_CLK_SRC 1626#define BLSP1_QUP5_I2C_APPS_CLK_SRC 1727#define BLSP1_QUP5_SPI_APPS_CLK_SRC 1828#define BLSP1_QUP6_I2C_APPS_CLK_SRC 1929#define BLSP1_QUP6_SPI_APPS_CLK_SRC 2030#define BLSP1_UART1_APPS_CLK_SRC 2131#define BLSP1_UART2_APPS_CLK_SRC 2232#define BLSP1_UART3_APPS_CLK_SRC 2333#define BLSP1_UART4_APPS_CLK_SRC 2434#define BLSP1_UART5_APPS_CLK_SRC 2535#define BLSP1_UART6_APPS_CLK_SRC 2636#define GCC_APSS_AHB_CLK 2737#define GCC_APSS_AXI_CLK 2838#define GCC_BLSP1_QUP1_I2C_APPS_CLK 2939#define GCC_BLSP1_QUP1_SPI_APPS_CLK 3040#define GCC_BLSP1_QUP2_I2C_APPS_CLK 3141#define GCC_BLSP1_QUP2_SPI_APPS_CLK 3242#define GCC_BLSP1_QUP3_I2C_APPS_CLK 3343#define GCC_BLSP1_QUP3_SPI_APPS_CLK 3444#define GCC_BLSP1_QUP4_I2C_APPS_CLK 3545#define GCC_BLSP1_QUP4_SPI_APPS_CLK 3646#define GCC_BLSP1_QUP5_I2C_APPS_CLK 3747#define GCC_BLSP1_QUP5_SPI_APPS_CLK 3848#define GCC_BLSP1_QUP6_I2C_APPS_CLK 3949#define GCC_BLSP1_QUP6_SPI_APPS_CLK 4050#define GCC_BLSP1_UART1_APPS_CLK 4151#define GCC_BLSP1_UART2_APPS_CLK 4252#define GCC_BLSP1_UART3_APPS_CLK 4353#define GCC_BLSP1_UART4_APPS_CLK 4454#define GCC_BLSP1_UART5_APPS_CLK 4555#define GCC_BLSP1_UART6_APPS_CLK 4656#define PCIE0_AXI_M_CLK_SRC 4757#define GCC_PCIE0_AXI_M_CLK 4858#define PCIE1_AXI_M_CLK_SRC 4959#define GCC_PCIE1_AXI_M_CLK 5060#define PCIE2_AXI_M_CLK_SRC 5161#define GCC_PCIE2_AXI_M_CLK 5262#define PCIE3_AXI_M_CLK_SRC 5363#define GCC_PCIE3_AXI_M_CLK 5464#define PCIE0_AXI_S_CLK_SRC 5565#define GCC_PCIE0_AXI_S_BRIDGE_CLK 5666#define GCC_PCIE0_AXI_S_CLK 5767#define PCIE1_AXI_S_CLK_SRC 5868#define GCC_PCIE1_AXI_S_BRIDGE_CLK 5969#define GCC_PCIE1_AXI_S_CLK 6070#define PCIE2_AXI_S_CLK_SRC 6171#define GCC_PCIE2_AXI_S_BRIDGE_CLK 6272#define GCC_PCIE2_AXI_S_CLK 6373#define PCIE3_AXI_S_CLK_SRC 6474#define GCC_PCIE3_AXI_S_BRIDGE_CLK 6575#define GCC_PCIE3_AXI_S_CLK 6676#define PCIE0_PIPE_CLK_SRC 6777#define PCIE1_PIPE_CLK_SRC 6878#define PCIE2_PIPE_CLK_SRC 6979#define PCIE3_PIPE_CLK_SRC 7080#define PCIE_AUX_CLK_SRC 7181#define GCC_PCIE0_AUX_CLK 7282#define GCC_PCIE1_AUX_CLK 7383#define GCC_PCIE2_AUX_CLK 7484#define GCC_PCIE3_AUX_CLK 7585#define PCIE0_RCHNG_CLK_SRC 7686#define GCC_PCIE0_RCHNG_CLK 7787#define PCIE1_RCHNG_CLK_SRC 7888#define GCC_PCIE1_RCHNG_CLK 7989#define PCIE2_RCHNG_CLK_SRC 8090#define GCC_PCIE2_RCHNG_CLK 8191#define PCIE3_RCHNG_CLK_SRC 8292#define GCC_PCIE3_RCHNG_CLK 8393#define GCC_PCIE0_AHB_CLK 8494#define GCC_PCIE1_AHB_CLK 8595#define GCC_PCIE2_AHB_CLK 8696#define GCC_PCIE3_AHB_CLK 8797#define USB0_AUX_CLK_SRC 8898#define GCC_USB0_AUX_CLK 8999#define USB0_MASTER_CLK_SRC 90100#define GCC_USB0_MASTER_CLK 91101#define GCC_SNOC_USB_CLK 92102#define GCC_ANOC_USB_AXI_CLK 93103#define USB0_MOCK_UTMI_CLK_SRC 94104#define USB0_MOCK_UTMI_DIV_CLK_SRC 95105#define GCC_USB0_MOCK_UTMI_CLK 96106#define USB0_PIPE_CLK_SRC 97107#define GCC_USB0_PHY_CFG_AHB_CLK 98108#define SDCC1_APPS_CLK_SRC 99109#define GCC_SDCC1_APPS_CLK 100110#define SDCC1_ICE_CORE_CLK_SRC 101111#define GCC_SDCC1_ICE_CORE_CLK 102112#define GCC_SDCC1_AHB_CLK 103113#define PCNOC_BFDCD_CLK_SRC 104114#define GCC_NSSCFG_CLK 105115#define GCC_NSSNOC_NSSCC_CLK 106116#define GCC_NSSCC_CLK 107117#define GCC_NSSNOC_PCNOC_1_CLK 108118#define GCC_QDSS_DAP_AHB_CLK 109119#define GCC_QDSS_CFG_AHB_CLK 110120#define GCC_QPIC_AHB_CLK 111121#define GCC_QPIC_CLK 112122#define GCC_BLSP1_AHB_CLK 113123#define GCC_MDIO_AHB_CLK 114124#define GCC_PRNG_AHB_CLK 115125#define GCC_UNIPHY0_AHB_CLK 116126#define GCC_UNIPHY1_AHB_CLK 117127#define GCC_UNIPHY2_AHB_CLK 118128#define GCC_CMN_12GPLL_AHB_CLK 119129#define GCC_CMN_12GPLL_APU_CLK 120130#define SYSTEM_NOC_BFDCD_CLK_SRC 121131#define GCC_NSSNOC_SNOC_CLK 122132#define GCC_NSSNOC_SNOC_1_CLK 123133#define GCC_QDSS_ETR_USB_CLK 124134#define WCSS_AHB_CLK_SRC 125135#define GCC_Q6_AHB_CLK 126136#define GCC_Q6_AHB_S_CLK 127137#define GCC_WCSS_ECAHB_CLK 128138#define GCC_WCSS_ACMT_CLK 129139#define GCC_SYS_NOC_WCSS_AHB_CLK 130140#define WCSS_AXI_M_CLK_SRC 131141#define GCC_ANOC_WCSS_AXI_M_CLK 132142#define QDSS_AT_CLK_SRC 133143#define GCC_Q6SS_ATBM_CLK 134144#define GCC_WCSS_DBG_IFC_ATB_CLK 135145#define GCC_NSSNOC_ATB_CLK 136146#define GCC_QDSS_AT_CLK 137147#define GCC_SYS_NOC_AT_CLK 138148#define GCC_PCNOC_AT_CLK 139149#define GCC_USB0_EUD_AT_CLK 140150#define GCC_QDSS_EUD_AT_CLK 141151#define QDSS_STM_CLK_SRC 142152#define GCC_QDSS_STM_CLK 143153#define GCC_SYS_NOC_QDSS_STM_AXI_CLK 144154#define QDSS_TRACECLKIN_CLK_SRC 145155#define GCC_QDSS_TRACECLKIN_CLK 146156#define QDSS_TSCTR_CLK_SRC 147157#define GCC_Q6_TSCTR_1TO2_CLK 148158#define GCC_WCSS_DBG_IFC_NTS_CLK 149159#define GCC_QDSS_TSCTR_DIV2_CLK 150160#define GCC_QDSS_TS_CLK 151161#define GCC_QDSS_TSCTR_DIV4_CLK 152162#define GCC_NSS_TS_CLK 153163#define GCC_QDSS_TSCTR_DIV8_CLK 154164#define GCC_QDSS_TSCTR_DIV16_CLK 155165#define GCC_Q6SS_PCLKDBG_CLK 156166#define GCC_Q6SS_TRIG_CLK 157167#define GCC_WCSS_DBG_IFC_APB_CLK 158168#define GCC_WCSS_DBG_IFC_DAPBUS_CLK 159169#define GCC_QDSS_DAP_CLK 160170#define GCC_QDSS_APB2JTAG_CLK 161171#define GCC_QDSS_TSCTR_DIV3_CLK 162172#define QPIC_IO_MACRO_CLK_SRC 163173#define GCC_QPIC_IO_MACRO_CLK 164174#define Q6_AXI_CLK_SRC 165175#define GCC_Q6_AXIM_CLK 166176#define GCC_WCSS_Q6_TBU_CLK 167177#define GCC_MEM_NOC_Q6_AXI_CLK 168178#define Q6_AXIM2_CLK_SRC 169179#define NSSNOC_MEMNOC_BFDCD_CLK_SRC 170180#define GCC_NSSNOC_MEMNOC_CLK 171181#define GCC_NSSNOC_MEM_NOC_1_CLK 172182#define GCC_NSS_TBU_CLK 173183#define GCC_MEM_NOC_NSSNOC_CLK 174184#define LPASS_AXIM_CLK_SRC 175185#define LPASS_SWAY_CLK_SRC 176186#define ADSS_PWM_CLK_SRC 177187#define GCC_ADSS_PWM_CLK 178188#define GP1_CLK_SRC 179189#define GP2_CLK_SRC 180190#define GP3_CLK_SRC 181191#define DDRSS_SMS_SLOW_CLK_SRC 182192#define GCC_XO_CLK_SRC 183193#define GCC_XO_CLK 184194#define GCC_NSSNOC_QOSGEN_REF_CLK 185195#define GCC_NSSNOC_TIMEOUT_REF_CLK 186196#define GCC_XO_DIV4_CLK 187197#define GCC_UNIPHY0_SYS_CLK 188198#define GCC_UNIPHY1_SYS_CLK 189199#define GCC_UNIPHY2_SYS_CLK 190200#define GCC_CMN_12GPLL_SYS_CLK 191201#define GCC_NSSNOC_XO_DCD_CLK 192202#define GCC_Q6SS_BOOT_CLK 193203#define UNIPHY_SYS_CLK_SRC 194204#define NSS_TS_CLK_SRC 195205#define GCC_ANOC_PCIE0_1LANE_M_CLK 196206#define GCC_ANOC_PCIE1_1LANE_M_CLK 197207#define GCC_ANOC_PCIE2_2LANE_M_CLK 198208#define GCC_ANOC_PCIE3_2LANE_M_CLK 199209#define GCC_SNOC_PCIE0_1LANE_S_CLK 200210#define GCC_SNOC_PCIE1_1LANE_S_CLK 201211#define GCC_SNOC_PCIE2_2LANE_S_CLK 202212#define GCC_SNOC_PCIE3_2LANE_S_CLK 203213#define GCC_CRYPTO_CLK_SRC 204214#define GCC_CRYPTO_CLK 205215#define GCC_CRYPTO_AXI_CLK 206216#define GCC_CRYPTO_AHB_CLK 207217#define GCC_USB0_PIPE_CLK 208218#define GCC_USB0_SLEEP_CLK 209219#define GCC_PCIE0_PIPE_CLK 210220#define GCC_PCIE1_PIPE_CLK 211221#define GCC_PCIE2_PIPE_CLK 212222#define GCC_PCIE3_PIPE_CLK 213223#endif224