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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (c) 2014, The Linux Foundation. All rights reserved.4 */5 6#ifndef _DT_BINDINGS_CLK_APQ_MMCC_8084_H7#define _DT_BINDINGS_CLK_APQ_MMCC_8084_H8 9#define MMSS_AHB_CLK_SRC 010#define MMSS_AXI_CLK_SRC 111#define MMPLL0 212#define MMPLL0_VOTE 313#define MMPLL1 414#define MMPLL1_VOTE 515#define MMPLL2 616#define MMPLL3 717#define MMPLL4 818#define CSI0_CLK_SRC 919#define CSI1_CLK_SRC 1020#define CSI2_CLK_SRC 1121#define CSI3_CLK_SRC 1222#define VCODEC0_CLK_SRC 1323#define VFE0_CLK_SRC 1424#define VFE1_CLK_SRC 1525#define MDP_CLK_SRC 1626#define PCLK0_CLK_SRC 1727#define PCLK1_CLK_SRC 1828#define OCMEMNOC_CLK_SRC 1929#define GFX3D_CLK_SRC 2030#define JPEG0_CLK_SRC 2131#define JPEG1_CLK_SRC 2232#define JPEG2_CLK_SRC 2333#define EDPPIXEL_CLK_SRC 2434#define EXTPCLK_CLK_SRC 2535#define VP_CLK_SRC 2636#define CCI_CLK_SRC 2737#define CAMSS_GP0_CLK_SRC 2838#define CAMSS_GP1_CLK_SRC 2939#define MCLK0_CLK_SRC 3040#define MCLK1_CLK_SRC 3141#define MCLK2_CLK_SRC 3242#define MCLK3_CLK_SRC 3343#define CSI0PHYTIMER_CLK_SRC 3444#define CSI1PHYTIMER_CLK_SRC 3545#define CSI2PHYTIMER_CLK_SRC 3646#define CPP_CLK_SRC 3747#define BYTE0_CLK_SRC 3848#define BYTE1_CLK_SRC 3949#define EDPAUX_CLK_SRC 4050#define EDPLINK_CLK_SRC 4151#define ESC0_CLK_SRC 4252#define ESC1_CLK_SRC 4353#define HDMI_CLK_SRC 4454#define VSYNC_CLK_SRC 4555#define MMSS_RBCPR_CLK_SRC 4656#define RBBMTIMER_CLK_SRC 4757#define MAPLE_CLK_SRC 4858#define VDP_CLK_SRC 4959#define VPU_BUS_CLK_SRC 5060#define MMSS_CXO_CLK 5161#define MMSS_SLEEPCLK_CLK 5262#define AVSYNC_AHB_CLK 5363#define AVSYNC_EDPPIXEL_CLK 5464#define AVSYNC_EXTPCLK_CLK 5565#define AVSYNC_PCLK0_CLK 5666#define AVSYNC_PCLK1_CLK 5767#define AVSYNC_VP_CLK 5868#define CAMSS_AHB_CLK 5969#define CAMSS_CCI_CCI_AHB_CLK 6070#define CAMSS_CCI_CCI_CLK 6171#define CAMSS_CSI0_AHB_CLK 6272#define CAMSS_CSI0_CLK 6373#define CAMSS_CSI0PHY_CLK 6474#define CAMSS_CSI0PIX_CLK 6575#define CAMSS_CSI0RDI_CLK 6676#define CAMSS_CSI1_AHB_CLK 6777#define CAMSS_CSI1_CLK 6878#define CAMSS_CSI1PHY_CLK 6979#define CAMSS_CSI1PIX_CLK 7080#define CAMSS_CSI1RDI_CLK 7181#define CAMSS_CSI2_AHB_CLK 7282#define CAMSS_CSI2_CLK 7383#define CAMSS_CSI2PHY_CLK 7484#define CAMSS_CSI2PIX_CLK 7585#define CAMSS_CSI2RDI_CLK 7686#define CAMSS_CSI3_AHB_CLK 7787#define CAMSS_CSI3_CLK 7888#define CAMSS_CSI3PHY_CLK 7989#define CAMSS_CSI3PIX_CLK 8090#define CAMSS_CSI3RDI_CLK 8191#define CAMSS_CSI_VFE0_CLK 8292#define CAMSS_CSI_VFE1_CLK 8393#define CAMSS_GP0_CLK 8494#define CAMSS_GP1_CLK 8595#define CAMSS_ISPIF_AHB_CLK 8696#define CAMSS_JPEG_JPEG0_CLK 8797#define CAMSS_JPEG_JPEG1_CLK 8898#define CAMSS_JPEG_JPEG2_CLK 8999#define CAMSS_JPEG_JPEG_AHB_CLK 90100#define CAMSS_JPEG_JPEG_AXI_CLK 91101#define CAMSS_MCLK0_CLK 92102#define CAMSS_MCLK1_CLK 93103#define CAMSS_MCLK2_CLK 94104#define CAMSS_MCLK3_CLK 95105#define CAMSS_MICRO_AHB_CLK 96106#define CAMSS_PHY0_CSI0PHYTIMER_CLK 97107#define CAMSS_PHY1_CSI1PHYTIMER_CLK 98108#define CAMSS_PHY2_CSI2PHYTIMER_CLK 99109#define CAMSS_TOP_AHB_CLK 100110#define CAMSS_VFE_CPP_AHB_CLK 101111#define CAMSS_VFE_CPP_CLK 102112#define CAMSS_VFE_VFE0_CLK 103113#define CAMSS_VFE_VFE1_CLK 104114#define CAMSS_VFE_VFE_AHB_CLK 105115#define CAMSS_VFE_VFE_AXI_CLK 106116#define MDSS_AHB_CLK 107117#define MDSS_AXI_CLK 108118#define MDSS_BYTE0_CLK 109119#define MDSS_BYTE1_CLK 110120#define MDSS_EDPAUX_CLK 111121#define MDSS_EDPLINK_CLK 112122#define MDSS_EDPPIXEL_CLK 113123#define MDSS_ESC0_CLK 114124#define MDSS_ESC1_CLK 115125#define MDSS_EXTPCLK_CLK 116126#define MDSS_HDMI_AHB_CLK 117127#define MDSS_HDMI_CLK 118128#define MDSS_MDP_CLK 119129#define MDSS_MDP_LUT_CLK 120130#define MDSS_PCLK0_CLK 121131#define MDSS_PCLK1_CLK 122132#define MDSS_VSYNC_CLK 123133#define MMSS_RBCPR_AHB_CLK 124134#define MMSS_RBCPR_CLK 125135#define MMSS_SPDM_AHB_CLK 126136#define MMSS_SPDM_AXI_CLK 127137#define MMSS_SPDM_CSI0_CLK 128138#define MMSS_SPDM_GFX3D_CLK 129139#define MMSS_SPDM_JPEG0_CLK 130140#define MMSS_SPDM_JPEG1_CLK 131141#define MMSS_SPDM_JPEG2_CLK 132142#define MMSS_SPDM_MDP_CLK 133143#define MMSS_SPDM_PCLK0_CLK 134144#define MMSS_SPDM_PCLK1_CLK 135145#define MMSS_SPDM_VCODEC0_CLK 136146#define MMSS_SPDM_VFE0_CLK 137147#define MMSS_SPDM_VFE1_CLK 138148#define MMSS_SPDM_RM_AXI_CLK 139149#define MMSS_SPDM_RM_OCMEMNOC_CLK 140150#define MMSS_MISC_AHB_CLK 141151#define MMSS_MMSSNOC_AHB_CLK 142152#define MMSS_MMSSNOC_BTO_AHB_CLK 143153#define MMSS_MMSSNOC_AXI_CLK 144154#define MMSS_S0_AXI_CLK 145155#define OCMEMCX_AHB_CLK 146156#define OCMEMCX_OCMEMNOC_CLK 147157#define OXILI_OCMEMGX_CLK 148158#define OXILI_GFX3D_CLK 149159#define OXILI_RBBMTIMER_CLK 150160#define OXILICX_AHB_CLK 151161#define VENUS0_AHB_CLK 152162#define VENUS0_AXI_CLK 153163#define VENUS0_CORE0_VCODEC_CLK 154164#define VENUS0_CORE1_VCODEC_CLK 155165#define VENUS0_OCMEMNOC_CLK 156166#define VENUS0_VCODEC0_CLK 157167#define VPU_AHB_CLK 158168#define VPU_AXI_CLK 159169#define VPU_BUS_CLK 160170#define VPU_CXO_CLK 161171#define VPU_MAPLE_CLK 162172#define VPU_SLEEP_CLK 163173#define VPU_VDP_CLK 164174 175/* GDSCs */176#define VENUS0_GDSC 0177#define VENUS0_CORE0_GDSC 1178#define VENUS0_CORE1_GDSC 2179#define MDSS_GDSC 3180#define CAMSS_JPEG_GDSC 4181#define CAMSS_VFE_GDSC 5182#define OXILI_GDSC 6183#define OXILICX_GDSC 7184 185#endif186