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1/* SPDX-License-Identifier: GPL-2.02 *3 * Copyright (C) 2014 Renesas Solutions Corp.4 * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>5 */6 7#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__8#define __DT_BINDINGS_CLOCK_R7S72100_H__9 10#define R7S72100_CLK_PLL 011#define R7S72100_CLK_I 112#define R7S72100_CLK_G 213 14/* MSTP2 */15#define R7S72100_CLK_CORESIGHT 016 17/* MSTP3 */18#define R7S72100_CLK_IEBUS 719#define R7S72100_CLK_IRDA 620#define R7S72100_CLK_LIN0 521#define R7S72100_CLK_LIN1 422#define R7S72100_CLK_MTU2 323#define R7S72100_CLK_CAN 224#define R7S72100_CLK_ADCPWR 125#define R7S72100_CLK_PWM 026 27/* MSTP4 */28#define R7S72100_CLK_SCIF0 729#define R7S72100_CLK_SCIF1 630#define R7S72100_CLK_SCIF2 531#define R7S72100_CLK_SCIF3 432#define R7S72100_CLK_SCIF4 333#define R7S72100_CLK_SCIF5 234#define R7S72100_CLK_SCIF6 135#define R7S72100_CLK_SCIF7 036 37/* MSTP5 */38#define R7S72100_CLK_SCI0 739#define R7S72100_CLK_SCI1 640#define R7S72100_CLK_SG0 541#define R7S72100_CLK_SG1 442#define R7S72100_CLK_SG2 343#define R7S72100_CLK_SG3 244#define R7S72100_CLK_OSTM0 145#define R7S72100_CLK_OSTM1 046 47/* MSTP6 */48#define R7S72100_CLK_ADC 749#define R7S72100_CLK_CEU 650#define R7S72100_CLK_DOC0 551#define R7S72100_CLK_DOC1 452#define R7S72100_CLK_DRC0 353#define R7S72100_CLK_DRC1 254#define R7S72100_CLK_JCU 155#define R7S72100_CLK_RTC 056 57/* MSTP7 */58#define R7S72100_CLK_VDEC0 759#define R7S72100_CLK_VDEC1 660#define R7S72100_CLK_ETHER 461#define R7S72100_CLK_NAND 362#define R7S72100_CLK_USB0 163#define R7S72100_CLK_USB1 064 65/* MSTP8 */66#define R7S72100_CLK_IMR0 767#define R7S72100_CLK_IMR1 668#define R7S72100_CLK_IMRDISP 569#define R7S72100_CLK_MMCIF 470#define R7S72100_CLK_MLB 371#define R7S72100_CLK_ETHAVB 272#define R7S72100_CLK_SCUX 173 74/* MSTP9 */75#define R7S72100_CLK_I2C0 776#define R7S72100_CLK_I2C1 677#define R7S72100_CLK_I2C2 578#define R7S72100_CLK_I2C3 479#define R7S72100_CLK_SPIBSC0 380#define R7S72100_CLK_SPIBSC1 281#define R7S72100_CLK_VDC50 1 /* and LVDS */82#define R7S72100_CLK_VDC51 083 84/* MSTP10 */85#define R7S72100_CLK_SPI0 786#define R7S72100_CLK_SPI1 687#define R7S72100_CLK_SPI2 588#define R7S72100_CLK_SPI3 489#define R7S72100_CLK_SPI4 390#define R7S72100_CLK_CDROM 291#define R7S72100_CLK_SPDIF 192#define R7S72100_CLK_RGPVG2 093 94/* MSTP11 */95#define R7S72100_CLK_SSI0 596#define R7S72100_CLK_SSI1 497#define R7S72100_CLK_SSI2 398#define R7S72100_CLK_SSI3 299#define R7S72100_CLK_SSI4 1100#define R7S72100_CLK_SSI5 0101 102/* MSTP12 */103#define R7S72100_CLK_SDHI00 3104#define R7S72100_CLK_SDHI01 2105#define R7S72100_CLK_SDHI10 1106#define R7S72100_CLK_SDHI11 0107 108/* MSTP13 */109#define R7S72100_CLK_PIX1 2110#define R7S72100_CLK_PIX0 1111 112#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */113