63 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>4 */5#ifndef __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__6#define __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* r8a77965 CPG Core Clocks */11#define R8A77965_CLK_Z 012#define R8A77965_CLK_ZR 113#define R8A77965_CLK_ZG 214#define R8A77965_CLK_ZTR 315#define R8A77965_CLK_ZTRD2 416#define R8A77965_CLK_ZT 517#define R8A77965_CLK_ZX 618#define R8A77965_CLK_S0D1 719#define R8A77965_CLK_S0D2 820#define R8A77965_CLK_S0D3 921#define R8A77965_CLK_S0D4 1022#define R8A77965_CLK_S0D6 1123#define R8A77965_CLK_S0D8 1224#define R8A77965_CLK_S0D12 1325#define R8A77965_CLK_S1D1 1426#define R8A77965_CLK_S1D2 1527#define R8A77965_CLK_S1D4 1628#define R8A77965_CLK_S2D1 1729#define R8A77965_CLK_S2D2 1830#define R8A77965_CLK_S2D4 1931#define R8A77965_CLK_S3D1 2032#define R8A77965_CLK_S3D2 2133#define R8A77965_CLK_S3D4 2234#define R8A77965_CLK_LB 2335#define R8A77965_CLK_CL 2436#define R8A77965_CLK_ZB3 2537#define R8A77965_CLK_ZB3D2 2638#define R8A77965_CLK_CR 2739#define R8A77965_CLK_CRD2 2840#define R8A77965_CLK_SD0H 2941#define R8A77965_CLK_SD0 3042#define R8A77965_CLK_SD1H 3143#define R8A77965_CLK_SD1 3244#define R8A77965_CLK_SD2H 3345#define R8A77965_CLK_SD2 3446#define R8A77965_CLK_SD3H 3547#define R8A77965_CLK_SD3 3648#define R8A77965_CLK_SSP2 3749#define R8A77965_CLK_SSP1 3850#define R8A77965_CLK_SSPRS 3951#define R8A77965_CLK_RPC 4052#define R8A77965_CLK_RPCD2 4153#define R8A77965_CLK_MSO 4254#define R8A77965_CLK_CANFD 4355#define R8A77965_CLK_HDMI 4456#define R8A77965_CLK_CSI0 4557#define R8A77965_CLK_CP 4658#define R8A77965_CLK_CPEX 4759#define R8A77965_CLK_R 4860#define R8A77965_CLK_OSC 4961 62#endif /* __DT_BINDINGS_CLOCK_R8A77965_CPG_MSSR_H__ */63