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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (C) 2018 Renesas Electronics Corp.4 */5#ifndef __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__6#define __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* r8a77990 CPG Core Clocks */11#define R8A77990_CLK_Z2 012#define R8A77990_CLK_ZR 113#define R8A77990_CLK_ZG 214#define R8A77990_CLK_ZTR 315#define R8A77990_CLK_ZT 416#define R8A77990_CLK_ZX 517#define R8A77990_CLK_S0D1 618#define R8A77990_CLK_S0D3 719#define R8A77990_CLK_S0D6 820#define R8A77990_CLK_S0D12 921#define R8A77990_CLK_S0D24 1022#define R8A77990_CLK_S1D1 1123#define R8A77990_CLK_S1D2 1224#define R8A77990_CLK_S1D4 1325#define R8A77990_CLK_S2D1 1426#define R8A77990_CLK_S2D2 1527#define R8A77990_CLK_S2D4 1628#define R8A77990_CLK_S3D1 1729#define R8A77990_CLK_S3D2 1830#define R8A77990_CLK_S3D4 1931#define R8A77990_CLK_S0D6C 2032#define R8A77990_CLK_S3D1C 2133#define R8A77990_CLK_S3D2C 2234#define R8A77990_CLK_S3D4C 2335#define R8A77990_CLK_LB 2436#define R8A77990_CLK_CL 2537#define R8A77990_CLK_ZB3 2638#define R8A77990_CLK_ZB3D2 2739#define R8A77990_CLK_CR 2840#define R8A77990_CLK_CRD2 2941#define R8A77990_CLK_SD0H 3042#define R8A77990_CLK_SD0 3143#define R8A77990_CLK_SD1H 3244#define R8A77990_CLK_SD1 3345#define R8A77990_CLK_SD3H 3446#define R8A77990_CLK_SD3 3547#define R8A77990_CLK_RPC 3648#define R8A77990_CLK_RPCD2 3749#define R8A77990_CLK_ZA2 3850#define R8A77990_CLK_ZA8 3951#define R8A77990_CLK_Z2D 4052#define R8A77990_CLK_CANFD 4153#define R8A77990_CLK_MSO 4254#define R8A77990_CLK_R 4355#define R8A77990_CLK_OSC 4456#define R8A77990_CLK_LV0 4557#define R8A77990_CLK_LV1 4658#define R8A77990_CLK_CSI0 4759#define R8A77990_CLK_CP 4860#define R8A77990_CLK_CPEX 4961 62#endif /* __DT_BINDINGS_CLOCK_R8A77990_CPG_MSSR_H__ */63