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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * Copyright (C) 2020 Renesas Electronics Corp.4 */5#ifndef __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__6#define __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* r8a779A0 CPG Core Clocks */11#define R8A779A0_CLK_Z0 012#define R8A779A0_CLK_ZX 113#define R8A779A0_CLK_Z1 214#define R8A779A0_CLK_ZR 315#define R8A779A0_CLK_ZS 416#define R8A779A0_CLK_ZT 517#define R8A779A0_CLK_ZTR 618#define R8A779A0_CLK_S1D1 719#define R8A779A0_CLK_S1D2 820#define R8A779A0_CLK_S1D4 921#define R8A779A0_CLK_S1D8 1022#define R8A779A0_CLK_S1D12 1123#define R8A779A0_CLK_S3D1 1224#define R8A779A0_CLK_S3D2 1325#define R8A779A0_CLK_S3D4 1426#define R8A779A0_CLK_LB 1527#define R8A779A0_CLK_CP 1628#define R8A779A0_CLK_CL 1729#define R8A779A0_CLK_CL16MCK 1830#define R8A779A0_CLK_ZB30 1931#define R8A779A0_CLK_ZB30D2 2032#define R8A779A0_CLK_ZB30D4 2133#define R8A779A0_CLK_ZB31 2234#define R8A779A0_CLK_ZB31D2 2335#define R8A779A0_CLK_ZB31D4 2436#define R8A779A0_CLK_SD0H 2537#define R8A779A0_CLK_SD0 2638#define R8A779A0_CLK_RPC 2739#define R8A779A0_CLK_RPCD2 2840#define R8A779A0_CLK_MSO 2941#define R8A779A0_CLK_CANFD 3042#define R8A779A0_CLK_CSI0 3143#define R8A779A0_CLK_FRAY 3244#define R8A779A0_CLK_DSI 3345#define R8A779A0_CLK_VIP 3446#define R8A779A0_CLK_ADGH 3547#define R8A779A0_CLK_CNNDSP 3648#define R8A779A0_CLK_ICU 3749#define R8A779A0_CLK_ICUD2 3850#define R8A779A0_CLK_VCBUS 3951#define R8A779A0_CLK_CBFUSA 4052#define R8A779A0_CLK_R 4153#define R8A779A0_CLK_OSC 4254 55#endif /* __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ */56