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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Copyright (C) 2022 Renesas Electronics Corp.4 */5#ifndef __DT_BINDINGS_CLOCK_R8A779G0_CPG_MSSR_H__6#define __DT_BINDINGS_CLOCK_R8A779G0_CPG_MSSR_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* r8a779g0 CPG Core Clocks */11 12#define R8A779G0_CLK_ZX 013#define R8A779G0_CLK_ZS 114#define R8A779G0_CLK_ZT 215#define R8A779G0_CLK_ZTR 316#define R8A779G0_CLK_S0D2 417#define R8A779G0_CLK_S0D3 518#define R8A779G0_CLK_S0D4 619#define R8A779G0_CLK_S0D1_VIO 720#define R8A779G0_CLK_S0D2_VIO 821#define R8A779G0_CLK_S0D4_VIO 922#define R8A779G0_CLK_S0D8_VIO 1023#define R8A779G0_CLK_S0D1_VC 1124#define R8A779G0_CLK_S0D2_VC 1225#define R8A779G0_CLK_S0D4_VC 1326#define R8A779G0_CLK_S0D2_MM 1427#define R8A779G0_CLK_S0D4_MM 1528#define R8A779G0_CLK_S0D2_U3DG 1629#define R8A779G0_CLK_S0D4_U3DG 1730#define R8A779G0_CLK_S0D2_RT 1831#define R8A779G0_CLK_S0D3_RT 1932#define R8A779G0_CLK_S0D4_RT 2033#define R8A779G0_CLK_S0D6_RT 2134#define R8A779G0_CLK_S0D24_RT 2235#define R8A779G0_CLK_S0D2_PER 2336#define R8A779G0_CLK_S0D3_PER 2437#define R8A779G0_CLK_S0D4_PER 2538#define R8A779G0_CLK_S0D6_PER 2639#define R8A779G0_CLK_S0D12_PER 2740#define R8A779G0_CLK_S0D24_PER 2841#define R8A779G0_CLK_S0D1_HSC 2942#define R8A779G0_CLK_S0D2_HSC 3043#define R8A779G0_CLK_S0D4_HSC 3144#define R8A779G0_CLK_S0D2_CC 3245#define R8A779G0_CLK_SVD1_IR 3346#define R8A779G0_CLK_SVD2_IR 3447#define R8A779G0_CLK_SVD1_VIP 3548#define R8A779G0_CLK_SVD2_VIP 3649#define R8A779G0_CLK_CL 3750#define R8A779G0_CLK_CL16M 3851#define R8A779G0_CLK_CL16M_MM 3952#define R8A779G0_CLK_CL16M_RT 4053#define R8A779G0_CLK_CL16M_PER 4154#define R8A779G0_CLK_CL16M_HSC 4255#define R8A779G0_CLK_Z0 4356#define R8A779G0_CLK_ZB3 4457#define R8A779G0_CLK_ZB3D2 4558#define R8A779G0_CLK_ZB3D4 4659#define R8A779G0_CLK_ZG 4760#define R8A779G0_CLK_SD0H 4861#define R8A779G0_CLK_SD0 4962#define R8A779G0_CLK_RPC 5063#define R8A779G0_CLK_RPCD2 5164#define R8A779G0_CLK_MSO 5265#define R8A779G0_CLK_CANFD 5366#define R8A779G0_CLK_CSI 5467#define R8A779G0_CLK_FRAY 5568#define R8A779G0_CLK_IPC 5669#define R8A779G0_CLK_SASYNCRT 5770#define R8A779G0_CLK_SASYNCPERD1 5871#define R8A779G0_CLK_SASYNCPERD2 5972#define R8A779G0_CLK_SASYNCPERD4 6073#define R8A779G0_CLK_VIOBUS 6174#define R8A779G0_CLK_VIOBUSD2 6275#define R8A779G0_CLK_VCBUS 6376#define R8A779G0_CLK_VCBUSD2 6477#define R8A779G0_CLK_DSIEXT 6578#define R8A779G0_CLK_DSIREF 6679#define R8A779G0_CLK_ADGH 6780#define R8A779G0_CLK_OSC 6881#define R8A779G0_CLK_ZR0 6982#define R8A779G0_CLK_ZR1 7083#define R8A779G0_CLK_ZR2 7184#define R8A779G0_CLK_IMPA 7285#define R8A779G0_CLK_IMPAD4 7386#define R8A779G0_CLK_CPEX 7487#define R8A779G0_CLK_CBFUSA 7588#define R8A779G0_CLK_R 7689#define R8A779G0_CLK_CP 7790 91#endif /* __DT_BINDINGS_CLOCK_R8A779G0_CPG_MSSR_H__ */92