288 lines · c
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 *3 * Copyright (C) 2022 Renesas Electronics Corp.4 */5#ifndef __DT_BINDINGS_CLOCK_R9A07G054_CPG_H__6#define __DT_BINDINGS_CLOCK_R9A07G054_CPG_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* R9A07G054 CPG Core Clocks */11#define R9A07G054_CLK_I 012#define R9A07G054_CLK_I2 113#define R9A07G054_CLK_G 214#define R9A07G054_CLK_S0 315#define R9A07G054_CLK_S1 416#define R9A07G054_CLK_SPI0 517#define R9A07G054_CLK_SPI1 618#define R9A07G054_CLK_SD0 719#define R9A07G054_CLK_SD1 820#define R9A07G054_CLK_M0 921#define R9A07G054_CLK_M1 1022#define R9A07G054_CLK_M2 1123#define R9A07G054_CLK_M3 1224#define R9A07G054_CLK_M4 1325#define R9A07G054_CLK_HP 1426#define R9A07G054_CLK_TSU 1527#define R9A07G054_CLK_ZT 1628#define R9A07G054_CLK_P0 1729#define R9A07G054_CLK_P1 1830#define R9A07G054_CLK_P2 1931#define R9A07G054_CLK_AT 2032#define R9A07G054_OSCCLK 2133#define R9A07G054_CLK_P0_DIV2 2234#define R9A07G054_CLK_DRP_M 2335#define R9A07G054_CLK_DRP_D 2436#define R9A07G054_CLK_DRP_A 2537 38/* R9A07G054 Module Clocks */39#define R9A07G054_CA55_SCLK 040#define R9A07G054_CA55_PCLK 141#define R9A07G054_CA55_ATCLK 242#define R9A07G054_CA55_GICCLK 343#define R9A07G054_CA55_PERICLK 444#define R9A07G054_CA55_ACLK 545#define R9A07G054_CA55_TSCLK 646#define R9A07G054_GIC600_GICCLK 747#define R9A07G054_IA55_CLK 848#define R9A07G054_IA55_PCLK 949#define R9A07G054_MHU_PCLK 1050#define R9A07G054_SYC_CNT_CLK 1151#define R9A07G054_DMAC_ACLK 1252#define R9A07G054_DMAC_PCLK 1353#define R9A07G054_OSTM0_PCLK 1454#define R9A07G054_OSTM1_PCLK 1555#define R9A07G054_OSTM2_PCLK 1656#define R9A07G054_MTU_X_MCK_MTU3 1757#define R9A07G054_POE3_CLKM_POE 1858#define R9A07G054_GPT_PCLK 1959#define R9A07G054_POEG_A_CLKP 2060#define R9A07G054_POEG_B_CLKP 2161#define R9A07G054_POEG_C_CLKP 2262#define R9A07G054_POEG_D_CLKP 2363#define R9A07G054_WDT0_PCLK 2464#define R9A07G054_WDT0_CLK 2565#define R9A07G054_WDT1_PCLK 2666#define R9A07G054_WDT1_CLK 2767#define R9A07G054_WDT2_PCLK 2868#define R9A07G054_WDT2_CLK 2969#define R9A07G054_SPI_CLK2 3070#define R9A07G054_SPI_CLK 3171#define R9A07G054_SDHI0_IMCLK 3272#define R9A07G054_SDHI0_IMCLK2 3373#define R9A07G054_SDHI0_CLK_HS 3474#define R9A07G054_SDHI0_ACLK 3575#define R9A07G054_SDHI1_IMCLK 3676#define R9A07G054_SDHI1_IMCLK2 3777#define R9A07G054_SDHI1_CLK_HS 3878#define R9A07G054_SDHI1_ACLK 3979#define R9A07G054_GPU_CLK 4080#define R9A07G054_GPU_AXI_CLK 4181#define R9A07G054_GPU_ACE_CLK 4282#define R9A07G054_ISU_ACLK 4383#define R9A07G054_ISU_PCLK 4484#define R9A07G054_H264_CLK_A 4585#define R9A07G054_H264_CLK_P 4686#define R9A07G054_CRU_SYSCLK 4787#define R9A07G054_CRU_VCLK 4888#define R9A07G054_CRU_PCLK 4989#define R9A07G054_CRU_ACLK 5090#define R9A07G054_MIPI_DSI_PLLCLK 5191#define R9A07G054_MIPI_DSI_SYSCLK 5292#define R9A07G054_MIPI_DSI_ACLK 5393#define R9A07G054_MIPI_DSI_PCLK 5494#define R9A07G054_MIPI_DSI_VCLK 5595#define R9A07G054_MIPI_DSI_LPCLK 5696#define R9A07G054_LCDC_CLK_A 5797#define R9A07G054_LCDC_CLK_P 5898#define R9A07G054_LCDC_CLK_D 5999#define R9A07G054_SSI0_PCLK2 60100#define R9A07G054_SSI0_PCLK_SFR 61101#define R9A07G054_SSI1_PCLK2 62102#define R9A07G054_SSI1_PCLK_SFR 63103#define R9A07G054_SSI2_PCLK2 64104#define R9A07G054_SSI2_PCLK_SFR 65105#define R9A07G054_SSI3_PCLK2 66106#define R9A07G054_SSI3_PCLK_SFR 67107#define R9A07G054_SRC_CLKP 68108#define R9A07G054_USB_U2H0_HCLK 69109#define R9A07G054_USB_U2H1_HCLK 70110#define R9A07G054_USB_U2P_EXR_CPUCLK 71111#define R9A07G054_USB_PCLK 72112#define R9A07G054_ETH0_CLK_AXI 73113#define R9A07G054_ETH0_CLK_CHI 74114#define R9A07G054_ETH1_CLK_AXI 75115#define R9A07G054_ETH1_CLK_CHI 76116#define R9A07G054_I2C0_PCLK 77117#define R9A07G054_I2C1_PCLK 78118#define R9A07G054_I2C2_PCLK 79119#define R9A07G054_I2C3_PCLK 80120#define R9A07G054_SCIF0_CLK_PCK 81121#define R9A07G054_SCIF1_CLK_PCK 82122#define R9A07G054_SCIF2_CLK_PCK 83123#define R9A07G054_SCIF3_CLK_PCK 84124#define R9A07G054_SCIF4_CLK_PCK 85125#define R9A07G054_SCI0_CLKP 86126#define R9A07G054_SCI1_CLKP 87127#define R9A07G054_IRDA_CLKP 88128#define R9A07G054_RSPI0_CLKB 89129#define R9A07G054_RSPI1_CLKB 90130#define R9A07G054_RSPI2_CLKB 91131#define R9A07G054_CANFD_PCLK 92132#define R9A07G054_GPIO_HCLK 93133#define R9A07G054_ADC_ADCLK 94134#define R9A07G054_ADC_PCLK 95135#define R9A07G054_TSU_PCLK 96136#define R9A07G054_STPAI_INITCLK 97137#define R9A07G054_STPAI_ACLK 98138#define R9A07G054_STPAI_MCLK 99139#define R9A07G054_STPAI_DCLKIN 100140#define R9A07G054_STPAI_ACLK_DRP 101141 142/* R9A07G054 Resets */143#define R9A07G054_CA55_RST_1_0 0144#define R9A07G054_CA55_RST_1_1 1145#define R9A07G054_CA55_RST_3_0 2146#define R9A07G054_CA55_RST_3_1 3147#define R9A07G054_CA55_RST_4 4148#define R9A07G054_CA55_RST_5 5149#define R9A07G054_CA55_RST_6 6150#define R9A07G054_CA55_RST_7 7151#define R9A07G054_CA55_RST_8 8152#define R9A07G054_CA55_RST_9 9153#define R9A07G054_CA55_RST_10 10154#define R9A07G054_CA55_RST_11 11155#define R9A07G054_CA55_RST_12 12156#define R9A07G054_GIC600_GICRESET_N 13157#define R9A07G054_GIC600_DBG_GICRESET_N 14158#define R9A07G054_IA55_RESETN 15159#define R9A07G054_MHU_RESETN 16160#define R9A07G054_DMAC_ARESETN 17161#define R9A07G054_DMAC_RST_ASYNC 18162#define R9A07G054_SYC_RESETN 19163#define R9A07G054_OSTM0_PRESETZ 20164#define R9A07G054_OSTM1_PRESETZ 21165#define R9A07G054_OSTM2_PRESETZ 22166#define R9A07G054_MTU_X_PRESET_MTU3 23167#define R9A07G054_POE3_RST_M_REG 24168#define R9A07G054_GPT_RST_C 25169#define R9A07G054_POEG_A_RST 26170#define R9A07G054_POEG_B_RST 27171#define R9A07G054_POEG_C_RST 28172#define R9A07G054_POEG_D_RST 29173#define R9A07G054_WDT0_PRESETN 30174#define R9A07G054_WDT1_PRESETN 31175#define R9A07G054_WDT2_PRESETN 32176#define R9A07G054_SPI_RST 33177#define R9A07G054_SDHI0_IXRST 34178#define R9A07G054_SDHI1_IXRST 35179#define R9A07G054_GPU_RESETN 36180#define R9A07G054_GPU_AXI_RESETN 37181#define R9A07G054_GPU_ACE_RESETN 38182#define R9A07G054_ISU_ARESETN 39183#define R9A07G054_ISU_PRESETN 40184#define R9A07G054_H264_X_RESET_VCP 41185#define R9A07G054_H264_CP_PRESET_P 42186#define R9A07G054_CRU_CMN_RSTB 43187#define R9A07G054_CRU_PRESETN 44188#define R9A07G054_CRU_ARESETN 45189#define R9A07G054_MIPI_DSI_CMN_RSTB 46190#define R9A07G054_MIPI_DSI_ARESET_N 47191#define R9A07G054_MIPI_DSI_PRESET_N 48192#define R9A07G054_LCDC_RESET_N 49193#define R9A07G054_SSI0_RST_M2_REG 50194#define R9A07G054_SSI1_RST_M2_REG 51195#define R9A07G054_SSI2_RST_M2_REG 52196#define R9A07G054_SSI3_RST_M2_REG 53197#define R9A07G054_SRC_RST 54198#define R9A07G054_USB_U2H0_HRESETN 55199#define R9A07G054_USB_U2H1_HRESETN 56200#define R9A07G054_USB_U2P_EXL_SYSRST 57201#define R9A07G054_USB_PRESETN 58202#define R9A07G054_ETH0_RST_HW_N 59203#define R9A07G054_ETH1_RST_HW_N 60204#define R9A07G054_I2C0_MRST 61205#define R9A07G054_I2C1_MRST 62206#define R9A07G054_I2C2_MRST 63207#define R9A07G054_I2C3_MRST 64208#define R9A07G054_SCIF0_RST_SYSTEM_N 65209#define R9A07G054_SCIF1_RST_SYSTEM_N 66210#define R9A07G054_SCIF2_RST_SYSTEM_N 67211#define R9A07G054_SCIF3_RST_SYSTEM_N 68212#define R9A07G054_SCIF4_RST_SYSTEM_N 69213#define R9A07G054_SCI0_RST 70214#define R9A07G054_SCI1_RST 71215#define R9A07G054_IRDA_RST 72216#define R9A07G054_RSPI0_RST 73217#define R9A07G054_RSPI1_RST 74218#define R9A07G054_RSPI2_RST 75219#define R9A07G054_CANFD_RSTP_N 76220#define R9A07G054_CANFD_RSTC_N 77221#define R9A07G054_GPIO_RSTN 78222#define R9A07G054_GPIO_PORT_RESETN 79223#define R9A07G054_GPIO_SPARE_RESETN 80224#define R9A07G054_ADC_PRESETN 81225#define R9A07G054_ADC_ADRST_N 82226#define R9A07G054_TSU_PRESETN 83227#define R9A07G054_STPAI_ARESETN 84228 229/* Power domain IDs. */230#define R9A07G054_PD_ALWAYS_ON 0231#define R9A07G054_PD_GIC 1232#define R9A07G054_PD_IA55 2233#define R9A07G054_PD_MHU 3234#define R9A07G054_PD_CORESIGHT 4235#define R9A07G054_PD_SYC 5236#define R9A07G054_PD_DMAC 6237#define R9A07G054_PD_GTM0 7238#define R9A07G054_PD_GTM1 8239#define R9A07G054_PD_GTM2 9240#define R9A07G054_PD_MTU 10241#define R9A07G054_PD_POE3 11242#define R9A07G054_PD_GPT 12243#define R9A07G054_PD_POEGA 13244#define R9A07G054_PD_POEGB 14245#define R9A07G054_PD_POEGC 15246#define R9A07G054_PD_POEGD 16247#define R9A07G054_PD_WDT0 17248#define R9A07G054_PD_WDT1 18249#define R9A07G054_PD_SPI 19250#define R9A07G054_PD_SDHI0 20251#define R9A07G054_PD_SDHI1 21252#define R9A07G054_PD_3DGE 22253#define R9A07G054_PD_ISU 23254#define R9A07G054_PD_VCPL4 24255#define R9A07G054_PD_CRU 25256#define R9A07G054_PD_MIPI_DSI 26257#define R9A07G054_PD_LCDC 27258#define R9A07G054_PD_SSI0 28259#define R9A07G054_PD_SSI1 29260#define R9A07G054_PD_SSI2 30261#define R9A07G054_PD_SSI3 31262#define R9A07G054_PD_SRC 32263#define R9A07G054_PD_USB0 33264#define R9A07G054_PD_USB1 34265#define R9A07G054_PD_USB_PHY 35266#define R9A07G054_PD_ETHER0 36267#define R9A07G054_PD_ETHER1 37268#define R9A07G054_PD_I2C0 38269#define R9A07G054_PD_I2C1 39270#define R9A07G054_PD_I2C2 40271#define R9A07G054_PD_I2C3 41272#define R9A07G054_PD_SCIF0 42273#define R9A07G054_PD_SCIF1 43274#define R9A07G054_PD_SCIF2 44275#define R9A07G054_PD_SCIF3 45276#define R9A07G054_PD_SCIF4 46277#define R9A07G054_PD_SCI0 47278#define R9A07G054_PD_SCI1 48279#define R9A07G054_PD_IRDA 49280#define R9A07G054_PD_RSPI0 50281#define R9A07G054_PD_RSPI1 51282#define R9A07G054_PD_RSPI2 52283#define R9A07G054_PD_CANFD 53284#define R9A07G054_PD_ADC 54285#define R9A07G054_PD_TSU 55286 287#endif /* __DT_BINDINGS_CLOCK_R9A07G054_CPG_H__ */288