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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)2 *3 * Copyright (C) 2022 Renesas Electronics Corp.4 */5#ifndef __DT_BINDINGS_CLOCK_R9A09G011_CPG_H__6#define __DT_BINDINGS_CLOCK_R9A09G011_CPG_H__7 8#include <dt-bindings/clock/renesas-cpg-mssr.h>9 10/* Module Clocks */11#define R9A09G011_SYS_CLK		012#define R9A09G011_PFC_PCLK		113#define R9A09G011_PMC_CORE_CLOCK	214#define R9A09G011_GIC_CLK		315#define R9A09G011_RAMA_ACLK		416#define R9A09G011_ROMA_ACLK		517#define R9A09G011_SEC_ACLK		618#define R9A09G011_SEC_PCLK		719#define R9A09G011_SEC_TCLK		820#define R9A09G011_DMAA_ACLK		921#define R9A09G011_TSU0_PCLK		1022#define R9A09G011_TSU1_PCLK		1123 24#define R9A09G011_CST_TRACECLK		1225#define R9A09G011_CST_SB_CLK		1326#define R9A09G011_CST_AHB_CLK		1427#define R9A09G011_CST_ATB_SB_CLK	1528#define R9A09G011_CST_TS_SB_CLK		1629 30#define R9A09G011_SDI0_ACLK		1731#define R9A09G011_SDI0_IMCLK		1832#define R9A09G011_SDI0_IMCLK2		1933#define R9A09G011_SDI0_CLK_HS		2034#define R9A09G011_SDI1_ACLK		2135#define R9A09G011_SDI1_IMCLK		2236#define R9A09G011_SDI1_IMCLK2		2337#define R9A09G011_SDI1_CLK_HS		2438#define R9A09G011_EMM_ACLK		2539#define R9A09G011_EMM_IMCLK		2640#define R9A09G011_EMM_IMCLK2		2741#define R9A09G011_EMM_CLK_HS		2842#define R9A09G011_NFI_ACLK		2943#define R9A09G011_NFI_NF_CLK		3044 45#define R9A09G011_PCI_ACLK		3146#define R9A09G011_PCI_CLK_PMU		3247#define R9A09G011_PCI_APB_CLK		3348#define R9A09G011_USB_ACLK_H		3449#define R9A09G011_USB_ACLK_P		3550#define R9A09G011_USB_PCLK		3651#define R9A09G011_ETH0_CLK_AXI		3752#define R9A09G011_ETH0_CLK_CHI		3853#define R9A09G011_ETH0_GPTP_EXT		3954 55#define R9A09G011_SDT_CLK		4056#define R9A09G011_SDT_CLKAPB		4157#define R9A09G011_SDT_CLK48		4258#define R9A09G011_GRP_CLK		4359#define R9A09G011_CIF_P0_CLK		4460#define R9A09G011_CIF_P1_CLK		4561#define R9A09G011_CIF_APB_CLK		4662#define R9A09G011_DCI_CLKAXI		4763#define R9A09G011_DCI_CLKAPB		4864#define R9A09G011_DCI_CLKDCI2		4965 66#define R9A09G011_HMI_PCLK		5067#define R9A09G011_LCI_PCLK		5168#define R9A09G011_LCI_ACLK		5269#define R9A09G011_LCI_VCLK		5370#define R9A09G011_LCI_LPCLK		5471 72#define R9A09G011_AUI_CLK		5573#define R9A09G011_AUI_CLKAXI		5674#define R9A09G011_AUI_CLKAPB		5775#define R9A09G011_AUMCLK		5876#define R9A09G011_GMCLK0		5977#define R9A09G011_GMCLK1		6078#define R9A09G011_MTR_CLK0		6179#define R9A09G011_MTR_CLK1		6280#define R9A09G011_MTR_CLKAPB		6381#define R9A09G011_GFT_CLK		6482#define R9A09G011_GFT_CLKAPB		6583#define R9A09G011_GFT_MCLK		6684 85#define R9A09G011_ATGA_CLK		6786#define R9A09G011_ATGA_CLKAPB		6887#define R9A09G011_ATGB_CLK		6988#define R9A09G011_ATGB_CLKAPB		7089#define R9A09G011_SYC_CNT_CLK		7190 91#define R9A09G011_CPERI_GRPA_PCLK	7292#define R9A09G011_TIM0_CLK		7393#define R9A09G011_TIM1_CLK		7494#define R9A09G011_TIM2_CLK		7595#define R9A09G011_TIM3_CLK		7696#define R9A09G011_TIM4_CLK		7797#define R9A09G011_TIM5_CLK		7898#define R9A09G011_TIM6_CLK		7999#define R9A09G011_TIM7_CLK		80100#define R9A09G011_IIC_PCLK0		81101 102#define R9A09G011_CPERI_GRPB_PCLK	82103#define R9A09G011_TIM8_CLK		83104#define R9A09G011_TIM9_CLK		84105#define R9A09G011_TIM10_CLK		85106#define R9A09G011_TIM11_CLK		86107#define R9A09G011_TIM12_CLK		87108#define R9A09G011_TIM13_CLK		88109#define R9A09G011_TIM14_CLK		89110#define R9A09G011_TIM15_CLK		90111#define R9A09G011_IIC_PCLK1		91112 113#define R9A09G011_CPERI_GRPC_PCLK	92114#define R9A09G011_TIM16_CLK		93115#define R9A09G011_TIM17_CLK		94116#define R9A09G011_TIM18_CLK		95117#define R9A09G011_TIM19_CLK		96118#define R9A09G011_TIM20_CLK		97119#define R9A09G011_TIM21_CLK		98120#define R9A09G011_TIM22_CLK		99121#define R9A09G011_TIM23_CLK		100122#define R9A09G011_WDT0_PCLK		101123#define R9A09G011_WDT0_CLK		102124#define R9A09G011_WDT1_PCLK		103125#define R9A09G011_WDT1_CLK		104126 127#define R9A09G011_CPERI_GRPD_PCLK	105128#define R9A09G011_TIM24_CLK		106129#define R9A09G011_TIM25_CLK		107130#define R9A09G011_TIM26_CLK		108131#define R9A09G011_TIM27_CLK		109132#define R9A09G011_TIM28_CLK		110133#define R9A09G011_TIM29_CLK		111134#define R9A09G011_TIM30_CLK		112135#define R9A09G011_TIM31_CLK		113136 137#define R9A09G011_CPERI_GRPE_PCLK	114138#define R9A09G011_PWM0_CLK		115139#define R9A09G011_PWM1_CLK		116140#define R9A09G011_PWM2_CLK		117141#define R9A09G011_PWM3_CLK		118142#define R9A09G011_PWM4_CLK		119143#define R9A09G011_PWM5_CLK		120144#define R9A09G011_PWM6_CLK		121145#define R9A09G011_PWM7_CLK		122146 147#define R9A09G011_CPERI_GRPF_PCLK	123148#define R9A09G011_PWM8_CLK		124149#define R9A09G011_PWM9_CLK		125150#define R9A09G011_PWM10_CLK		126151#define R9A09G011_PWM11_CLK		127152#define R9A09G011_PWM12_CLK		128153#define R9A09G011_PWM13_CLK		129154#define R9A09G011_PWM14_CLK		130155#define R9A09G011_PWM15_CLK		131156 157#define R9A09G011_CPERI_GRPG_PCLK	132158#define R9A09G011_CPERI_GRPH_PCLK	133159#define R9A09G011_URT_PCLK		134160#define R9A09G011_URT0_CLK		135161#define R9A09G011_URT1_CLK		136162#define R9A09G011_CSI0_CLK		137163#define R9A09G011_CSI1_CLK		138164#define R9A09G011_CSI2_CLK		139165#define R9A09G011_CSI3_CLK		140166#define R9A09G011_CSI4_CLK		141167#define R9A09G011_CSI5_CLK		142168 169#define R9A09G011_ICB_ACLK1		143170#define R9A09G011_ICB_GIC_CLK		144171#define R9A09G011_ICB_MPCLK1		145172#define R9A09G011_ICB_SPCLK1		146173#define R9A09G011_ICB_CLK48		147174#define R9A09G011_ICB_CLK48_2		148175#define R9A09G011_ICB_CLK48_3		149176#define R9A09G011_ICB_CLK48_4L		150177#define R9A09G011_ICB_CLK48_4R		151178#define R9A09G011_ICB_CLK48_5		152179#define R9A09G011_ICB_CST_ATB_SB_CLK	153180#define R9A09G011_ICB_CST_CS_CLK	154181#define R9A09G011_ICB_CLK100_1		155182#define R9A09G011_ICB_ETH0_CLK_AXI	156183#define R9A09G011_ICB_DCI_CLKAXI	157184#define R9A09G011_ICB_SYC_CNT_CLK	158185 186#define R9A09G011_ICB_DRPA_ACLK		159187#define R9A09G011_ICB_RFX_ACLK		160188#define R9A09G011_ICB_RFX_PCLK5		161189#define R9A09G011_ICB_MMC_ACLK		162190 191#define R9A09G011_ICB_MPCLK3		163192#define R9A09G011_ICB_CIMA_CLK		164193#define R9A09G011_ICB_CIMB_CLK		165194#define R9A09G011_ICB_BIMA_CLK		166195#define R9A09G011_ICB_FCD_CLKAXI	167196#define R9A09G011_ICB_VD_ACLK4		168197#define R9A09G011_ICB_MPCLK4		169198#define R9A09G011_ICB_VCD_PCLK4		170199 200#define R9A09G011_CA53_CLK		171201#define R9A09G011_CA53_ACLK		172202#define R9A09G011_CA53_APCLK_DBG	173203#define R9A09G011_CST_APB_CA53_CLK	174204#define R9A09G011_CA53_ATCLK		175205#define R9A09G011_CST_CS_CLK		176206#define R9A09G011_CA53_TSCLK		177207#define R9A09G011_CST_TS_CLK		178208#define R9A09G011_CA53_APCLK_REG	179209 210#define R9A09G011_DRPA_ACLK		180211#define R9A09G011_DRPA_DCLK		181212#define R9A09G011_DRPA_INITCLK		182213 214#define R9A09G011_RAMB0_ACLK		183215#define R9A09G011_RAMB1_ACLK		184216#define R9A09G011_RAMB2_ACLK		185217#define R9A09G011_RAMB3_ACLK		186218 219#define R9A09G011_CIMA_CLKAPB		187220#define R9A09G011_CIMA_CLK		188221#define R9A09G011_CIMB_CLK		189222#define R9A09G011_FAFA_CLK		190223#define R9A09G011_STG_CLKAXI		191224#define R9A09G011_STG_CLK0		192225 226#define R9A09G011_BIMA_CLKAPB		193227#define R9A09G011_BIMA_CLK		194228#define R9A09G011_FAFB_CLK		195229#define R9A09G011_FCD_CLK		196230#define R9A09G011_FCD_CLKAXI		197231 232#define R9A09G011_RIM_CLK		198233#define R9A09G011_VCD_ACLK		199234#define R9A09G011_VCD_PCLK		200235#define R9A09G011_JPG0_CLK		201236#define R9A09G011_JPG0_ACLK		202237 238#define R9A09G011_MMC_CORE_DDRC_CLK	203239#define R9A09G011_MMC_ACLK		204240#define R9A09G011_MMC_PCLK		205241#define R9A09G011_DDI_APBCLK		206242 243/* Resets */244#define R9A09G011_SYS_RST_N		0245#define R9A09G011_PFC_PRESETN		1246#define R9A09G011_RAMA_ARESETN		2247#define R9A09G011_ROM_ARESETN		3248#define R9A09G011_DMAA_ARESETN		4249#define R9A09G011_SEC_ARESETN		5250#define R9A09G011_SEC_PRESETN		6251#define R9A09G011_SEC_RSTB		7252#define R9A09G011_TSU0_RESETN		8253#define R9A09G011_TSU1_RESETN		9254#define R9A09G011_PMC_RESET_N		10255 256#define R9A09G011_CST_NTRST		11257#define R9A09G011_CST_NPOTRST		12258#define R9A09G011_CST_NTRST2		13259#define R9A09G011_CST_CS_RESETN		14260#define R9A09G011_CST_TS_RESETN		15261#define R9A09G011_CST_TRESETN		16262#define R9A09G011_CST_SB_RESETN		17263#define R9A09G011_CST_AHB_RESETN	18264#define R9A09G011_CST_TS_SB_RESETN	19265#define R9A09G011_CST_APB_CA53_RESETN	20266#define R9A09G011_CST_ATB_SB_RESETN	21267 268#define R9A09G011_SDI0_IXRST		22269#define R9A09G011_SDI1_IXRST		23270#define R9A09G011_EMM_IXRST		24271#define R9A09G011_NFI_MARESETN		25272#define R9A09G011_NFI_REG_RST_N		26273#define R9A09G011_USB_PRESET_N		27274#define R9A09G011_USB_DRD_RESET		28275#define R9A09G011_USB_ARESETN_P		29276#define R9A09G011_USB_ARESETN_H		30277#define R9A09G011_ETH0_RST_HW_N		31278#define R9A09G011_PCI_ARESETN		32279 280#define R9A09G011_SDT_RSTSYSAX		33281#define R9A09G011_GRP_RESETN		34282#define R9A09G011_CIF_RST_N		35283#define R9A09G011_DCU_RSTSYSAX		36284#define R9A09G011_HMI_RST_N		37285#define R9A09G011_HMI_PRESETN		38286#define R9A09G011_LCI_PRESETN		39287#define R9A09G011_LCI_ARESETN		40288 289#define R9A09G011_AUI_RSTSYSAX		41290#define R9A09G011_MTR_RSTSYSAX		42291#define R9A09G011_GFT_RSTSYSAX		43292#define R9A09G011_ATGA_RSTSYSAX		44293#define R9A09G011_ATGB_RSTSYSAX		45294#define R9A09G011_SYC_RST_N		46295 296#define R9A09G011_TIM_GPA_PRESETN	47297#define R9A09G011_TIM_GPB_PRESETN	48298#define R9A09G011_TIM_GPC_PRESETN	49299#define R9A09G011_TIM_GPD_PRESETN	50300#define R9A09G011_PWM_GPE_PRESETN	51301#define R9A09G011_PWM_GPF_PRESETN	52302#define R9A09G011_CSI_GPG_PRESETN	53303#define R9A09G011_CSI_GPH_PRESETN	54304#define R9A09G011_IIC_GPA_PRESETN	55305#define R9A09G011_IIC_GPB_PRESETN	56306#define R9A09G011_URT_PRESETN		57307#define R9A09G011_WDT0_PRESETN		58308#define R9A09G011_WDT1_PRESETN		59309 310#define R9A09G011_ICB_PD_AWO_RST_N	60311#define R9A09G011_ICB_PD_MMC_RST_N	61312#define R9A09G011_ICB_PD_VD0_RST_N	62313#define R9A09G011_ICB_PD_VD1_RST_N	63314#define R9A09G011_ICB_PD_RFX_RST_N	64315 316#define R9A09G011_CA53_NCPUPORESET0	65317#define R9A09G011_CA53_NCPUPORESET1	66318#define R9A09G011_CA53_NCORERESET0	67319#define R9A09G011_CA53_NCORERESET1	68320#define R9A09G011_CA53_NPRESETDBG	69321#define R9A09G011_CA53_L2RESET		70322#define R9A09G011_CA53_NMISCRESET_HM	71323#define R9A09G011_CA53_NMISCRESET_SM	72324#define R9A09G011_CA53_NARESET		73325 326#define R9A09G011_DRPA_ARESETN		74327 328#define R9A09G011_RAMB0_ARESETN		75329#define R9A09G011_RAMB1_ARESETN		76330#define R9A09G011_RAMB2_ARESETN		77331#define R9A09G011_RAMB3_ARESETN		78332 333#define R9A09G011_CIMA_RSTSYSAX		79334#define R9A09G011_CIMB_RSTSYSAX		80335#define R9A09G011_FAFA_RSTSYSAX		81336#define R9A09G011_STG_RSTSYSAX		82337 338#define R9A09G011_BIMA_RSTSYSAX		83339#define R9A09G011_FAFB_RSTSYSAX		84340#define R9A09G011_FCD_RSTSYSAX		85341#define R9A09G011_RIM_RSTSYSAX		86342#define R9A09G011_VCD_RESETN		87343#define R9A09G011_JPG_XRESET		88344 345#define R9A09G011_MMC_CORE_DDRC_RSTN	89346#define R9A09G011_MMC_ARESETN_N		90347#define R9A09G011_MMC_PRESETN		91348#define R9A09G011_DDI_PWROK		92349#define R9A09G011_DDI_RESET		93350#define R9A09G011_DDI_RESETN_APB	94351 352#endif /* __DT_BINDINGS_CLOCK_R9A09G011_CPG_H__ */353