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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright (c) 2016 Rockchip Electronics Co. Ltd.4 * Author: Elaine <zhangqing@rock-chips.com>5 */6 7#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H8#define _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H9 10/* core clocks */11#define PLL_APLL 112#define PLL_DPLL 213#define PLL_CPLL 314#define PLL_GPLL 415#define PLL_NPLL 516#define ARMCLK 617 18/* sclk gates (special clocks) */19#define SCLK_RTC32K 3020#define SCLK_SDMMC_EXT 3121#define SCLK_SPI 3222#define SCLK_SDMMC 3323#define SCLK_SDIO 3424#define SCLK_EMMC 3525#define SCLK_TSADC 3626#define SCLK_SARADC 3727#define SCLK_UART0 3828#define SCLK_UART1 3929#define SCLK_UART2 4030#define SCLK_I2S0 4131#define SCLK_I2S1 4232#define SCLK_I2S2 4333#define SCLK_I2S1_OUT 4434#define SCLK_I2S2_OUT 4535#define SCLK_SPDIF 4636#define SCLK_TIMER0 4737#define SCLK_TIMER1 4838#define SCLK_TIMER2 4939#define SCLK_TIMER3 5040#define SCLK_TIMER4 5141#define SCLK_TIMER5 5242#define SCLK_WIFI 5343#define SCLK_CIF_OUT 5444#define SCLK_I2C0 5545#define SCLK_I2C1 5646#define SCLK_I2C2 5747#define SCLK_I2C3 5848#define SCLK_CRYPTO 5949#define SCLK_PWM 6050#define SCLK_PDM 6151#define SCLK_EFUSE 6252#define SCLK_OTP 6353#define SCLK_DDRCLK 6454#define SCLK_VDEC_CABAC 6555#define SCLK_VDEC_CORE 6656#define SCLK_VENC_DSP 6757#define SCLK_VENC_CORE 6858#define SCLK_RGA 6959#define SCLK_HDMI_SFC 7060#define SCLK_HDMI_CEC 7161#define SCLK_USB3_REF 7262#define SCLK_USB3_SUSPEND 7363#define SCLK_SDMMC_DRV 7464#define SCLK_SDIO_DRV 7565#define SCLK_EMMC_DRV 7666#define SCLK_SDMMC_EXT_DRV 7767#define SCLK_SDMMC_SAMPLE 7868#define SCLK_SDIO_SAMPLE 7969#define SCLK_EMMC_SAMPLE 8070#define SCLK_SDMMC_EXT_SAMPLE 8171#define SCLK_VOP 8272#define SCLK_MAC2PHY_RXTX 8373#define SCLK_MAC2PHY_SRC 8474#define SCLK_MAC2PHY_REF 8575#define SCLK_MAC2PHY_OUT 8676#define SCLK_MAC2IO_RX 8777#define SCLK_MAC2IO_TX 8878#define SCLK_MAC2IO_REFOUT 8979#define SCLK_MAC2IO_REF 9080#define SCLK_MAC2IO_OUT 9181#define SCLK_TSP 9282#define SCLK_HSADC_TSP 9383#define SCLK_USB3PHY_REF 9484#define SCLK_REF_USB3OTG 9585#define SCLK_USB3OTG_REF 9686#define SCLK_USB3OTG_SUSPEND 9787#define SCLK_REF_USB3OTG_SRC 9888#define SCLK_MAC2IO_SRC 9989#define SCLK_MAC2IO 10090#define SCLK_MAC2PHY 10191#define SCLK_MAC2IO_EXT 10292 93/* dclk gates */94#define DCLK_LCDC 12095#define DCLK_HDMIPHY 12196#define HDMIPHY 12297#define USB480M 12398#define DCLK_LCDC_SRC 12499 100/* aclk gates */101#define ACLK_AXISRAM 130102#define ACLK_VOP_PRE 131103#define ACLK_USB3OTG 132104#define ACLK_RGA_PRE 133105#define ACLK_DMAC 134106#define ACLK_GPU 135107#define ACLK_BUS_PRE 136108#define ACLK_PERI_PRE 137109#define ACLK_RKVDEC_PRE 138110#define ACLK_RKVDEC 139111#define ACLK_RKVENC 140112#define ACLK_VPU_PRE 141113#define ACLK_VIO_PRE 142114#define ACLK_VPU 143115#define ACLK_VIO 144116#define ACLK_VOP 145117#define ACLK_GMAC 146118#define ACLK_H265 147119#define ACLK_H264 148120#define ACLK_MAC2PHY 149121#define ACLK_MAC2IO 150122#define ACLK_DCF 151123#define ACLK_TSP 152124#define ACLK_PERI 153125#define ACLK_RGA 154126#define ACLK_IEP 155127#define ACLK_CIF 156128#define ACLK_HDCP 157129 130/* pclk gates */131#define PCLK_GPIO0 200132#define PCLK_GPIO1 201133#define PCLK_GPIO2 202134#define PCLK_GPIO3 203135#define PCLK_GRF 204136#define PCLK_I2C0 205137#define PCLK_I2C1 206138#define PCLK_I2C2 207139#define PCLK_I2C3 208140#define PCLK_SPI 209141#define PCLK_UART0 210142#define PCLK_UART1 211143#define PCLK_UART2 212144#define PCLK_TSADC 213145#define PCLK_PWM 214146#define PCLK_TIMER 215147#define PCLK_BUS_PRE 216148#define PCLK_PERI_PRE 217149#define PCLK_HDMI_CTRL 218150#define PCLK_HDMI_PHY 219151#define PCLK_GMAC 220152#define PCLK_H265 221153#define PCLK_MAC2PHY 222154#define PCLK_MAC2IO 223155#define PCLK_USB3PHY_OTG 224156#define PCLK_USB3PHY_PIPE 225157#define PCLK_USB3_GRF 226158#define PCLK_USB2_GRF 227159#define PCLK_HDMIPHY 228160#define PCLK_DDR 229161#define PCLK_PERI 230162#define PCLK_HDMI 231163#define PCLK_HDCP 232164#define PCLK_DCF 233165#define PCLK_SARADC 234166#define PCLK_ACODECPHY 235167#define PCLK_WDT 236168 169/* hclk gates */170#define HCLK_PERI 308171#define HCLK_TSP 309172#define HCLK_GMAC 310173#define HCLK_I2S0_8CH 311174#define HCLK_I2S1_8CH 312175#define HCLK_I2S2_2CH 313176#define HCLK_SPDIF_8CH 314177#define HCLK_VOP 315178#define HCLK_NANDC 316179#define HCLK_SDMMC 317180#define HCLK_SDIO 318181#define HCLK_EMMC 319182#define HCLK_SDMMC_EXT 320183#define HCLK_RKVDEC_PRE 321184#define HCLK_RKVDEC 322185#define HCLK_RKVENC 323186#define HCLK_VPU_PRE 324187#define HCLK_VIO_PRE 325188#define HCLK_VPU 326189#define HCLK_BUS_PRE 328190#define HCLK_PERI_PRE 329191#define HCLK_H264 330192#define HCLK_CIF 331193#define HCLK_OTG_PMU 332194#define HCLK_OTG 333195#define HCLK_HOST0 334196#define HCLK_HOST0_ARB 335197#define HCLK_CRYPTO_MST 336198#define HCLK_CRYPTO_SLV 337199#define HCLK_PDM 338200#define HCLK_IEP 339201#define HCLK_RGA 340202#define HCLK_HDCP 341203 204/* soft-reset indices */205#define SRST_CORE0_PO 0206#define SRST_CORE1_PO 1207#define SRST_CORE2_PO 2208#define SRST_CORE3_PO 3209#define SRST_CORE0 4210#define SRST_CORE1 5211#define SRST_CORE2 6212#define SRST_CORE3 7213#define SRST_CORE0_DBG 8214#define SRST_CORE1_DBG 9215#define SRST_CORE2_DBG 10216#define SRST_CORE3_DBG 11217#define SRST_TOPDBG 12218#define SRST_CORE_NIU 13219#define SRST_STRC_A 14220#define SRST_L2C 15221 222#define SRST_A53_GIC 18223#define SRST_DAP 19224#define SRST_PMU_P 21225#define SRST_EFUSE 22226#define SRST_BUSSYS_H 23227#define SRST_BUSSYS_P 24228#define SRST_SPDIF 25229#define SRST_INTMEM 26230#define SRST_ROM 27231#define SRST_GPIO0 28232#define SRST_GPIO1 29233#define SRST_GPIO2 30234#define SRST_GPIO3 31235 236#define SRST_I2S0 32237#define SRST_I2S1 33238#define SRST_I2S2 34239#define SRST_I2S0_H 35240#define SRST_I2S1_H 36241#define SRST_I2S2_H 37242#define SRST_UART0 38243#define SRST_UART1 39244#define SRST_UART2 40245#define SRST_UART0_P 41246#define SRST_UART1_P 42247#define SRST_UART2_P 43248#define SRST_I2C0 44249#define SRST_I2C1 45250#define SRST_I2C2 46251#define SRST_I2C3 47252 253#define SRST_I2C0_P 48254#define SRST_I2C1_P 49255#define SRST_I2C2_P 50256#define SRST_I2C3_P 51257#define SRST_EFUSE_SE_P 52258#define SRST_EFUSE_NS_P 53259#define SRST_PWM0 54260#define SRST_PWM0_P 55261#define SRST_DMA 56262#define SRST_TSP_A 57263#define SRST_TSP_H 58264#define SRST_TSP 59265#define SRST_TSP_HSADC 60266#define SRST_DCF_A 61267#define SRST_DCF_P 62268 269#define SRST_SCR 64270#define SRST_SPI 65271#define SRST_TSADC 66272#define SRST_TSADC_P 67273#define SRST_CRYPTO 68274#define SRST_SGRF 69275#define SRST_GRF 70276#define SRST_USB_GRF 71277#define SRST_TIMER_6CH_P 72278#define SRST_TIMER0 73279#define SRST_TIMER1 74280#define SRST_TIMER2 75281#define SRST_TIMER3 76282#define SRST_TIMER4 77283#define SRST_TIMER5 78284#define SRST_USB3GRF 79285 286#define SRST_PHYNIU 80287#define SRST_HDMIPHY 81288#define SRST_VDAC 82289#define SRST_ACODEC_p 83290#define SRST_SARADC 85291#define SRST_SARADC_P 86292#define SRST_GRF_DDR 87293#define SRST_DFIMON 88294#define SRST_MSCH 89295#define SRST_DDRMSCH 91296#define SRST_DDRCTRL 92297#define SRST_DDRCTRL_P 93298#define SRST_DDRPHY 94299#define SRST_DDRPHY_P 95300 301#define SRST_GMAC_NIU_A 96302#define SRST_GMAC_NIU_P 97303#define SRST_GMAC2PHY_A 98304#define SRST_GMAC2IO_A 99305#define SRST_MACPHY 100306#define SRST_OTP_PHY 101307#define SRST_GPU_A 102308#define SRST_GPU_NIU_A 103309#define SRST_SDMMCEXT 104310#define SRST_PERIPH_NIU_A 105311#define SRST_PERIHP_NIU_H 106312#define SRST_PERIHP_P 107313#define SRST_PERIPHSYS_H 108314#define SRST_MMC0 109315#define SRST_SDIO 110316#define SRST_EMMC 111317 318#define SRST_USB2OTG_H 112319#define SRST_USB2OTG 113320#define SRST_USB2OTG_ADP 114321#define SRST_USB2HOST_H 115322#define SRST_USB2HOST_ARB 116323#define SRST_USB2HOST_AUX 117324#define SRST_USB2HOST_EHCIPHY 118325#define SRST_USB2HOST_UTMI 119326#define SRST_USB3OTG 120327#define SRST_USBPOR 121328#define SRST_USB2OTG_UTMI 122329#define SRST_USB2HOST_PHY_UTMI 123330#define SRST_USB3OTG_UTMI 124331#define SRST_USB3PHY_U2 125332#define SRST_USB3PHY_U3 126333#define SRST_USB3PHY_PIPE 127334 335#define SRST_VIO_A 128336#define SRST_VIO_BUS_H 129337#define SRST_VIO_H2P_H 130338#define SRST_VIO_ARBI_H 131339#define SRST_VOP_NIU_A 132340#define SRST_VOP_A 133341#define SRST_VOP_H 134342#define SRST_VOP_D 135343#define SRST_RGA 136344#define SRST_RGA_NIU_A 137345#define SRST_RGA_A 138346#define SRST_RGA_H 139347#define SRST_IEP_A 140348#define SRST_IEP_H 141349#define SRST_HDMI 142350#define SRST_HDMI_P 143351 352#define SRST_HDCP_A 144353#define SRST_HDCP 145354#define SRST_HDCP_H 146355#define SRST_CIF_A 147356#define SRST_CIF_H 148357#define SRST_CIF_P 149358#define SRST_OTP_P 150359#define SRST_OTP_SBPI 151360#define SRST_OTP_USER 152361#define SRST_DDRCTRL_A 153362#define SRST_DDRSTDY_P 154363#define SRST_DDRSTDY 155364#define SRST_PDM_H 156365#define SRST_PDM 157366#define SRST_USB3PHY_OTG_P 158367#define SRST_USB3PHY_PIPE_P 159368 369#define SRST_VCODEC_A 160370#define SRST_VCODEC_NIU_A 161371#define SRST_VCODEC_H 162372#define SRST_VCODEC_NIU_H 163373#define SRST_VDEC_A 164374#define SRST_VDEC_NIU_A 165375#define SRST_VDEC_H 166376#define SRST_VDEC_NIU_H 167377#define SRST_VDEC_CORE 168378#define SRST_VDEC_CABAC 169379#define SRST_DDRPHYDIV 175380 381#define SRST_RKVENC_NIU_A 176382#define SRST_RKVENC_NIU_H 177383#define SRST_RKVENC_H265_A 178384#define SRST_RKVENC_H265_P 179385#define SRST_RKVENC_H265_CORE 180386#define SRST_RKVENC_H265_DSP 181387#define SRST_RKVENC_H264_A 182388#define SRST_RKVENC_H264_H 183389#define SRST_RKVENC_INTMEM 184390 391#endif392