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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2013 Tomasz Figa <tomasz.figa at gmail.com>4 *5 * Device Tree binding constants for Samsung S3C64xx clock controller.6 */7 8#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H9#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H10 11/*12 * Let each exported clock get a unique index, which is used on DT-enabled13 * platforms to lookup the clock from a clock specifier. These indices are14 * therefore considered an ABI and so must not be changed. This implies15 * that new clocks should be added either in free spaces between clock groups16 * or at the end.17 */18 19/* Core clocks. */20#define CLK27M 121#define CLK48M 222#define FOUT_APLL 323#define FOUT_MPLL 424#define FOUT_EPLL 525#define ARMCLK 626#define HCLKX2 727#define HCLK 828#define PCLK 929 30/* HCLK bus clocks. */31#define HCLK_3DSE 1632#define HCLK_UHOST 1733#define HCLK_SECUR 1834#define HCLK_SDMA1 1935#define HCLK_SDMA0 2036#define HCLK_IROM 2137#define HCLK_DDR1 2238#define HCLK_MEM1 2339#define HCLK_MEM0 2440#define HCLK_USB 2541#define HCLK_HSMMC2 2642#define HCLK_HSMMC1 2743#define HCLK_HSMMC0 2844#define HCLK_MDP 2945#define HCLK_DHOST 3046#define HCLK_IHOST 3147#define HCLK_DMA1 3248#define HCLK_DMA0 3349#define HCLK_JPEG 3450#define HCLK_CAMIF 3551#define HCLK_SCALER 3652#define HCLK_2D 3753#define HCLK_TV 3854#define HCLK_POST0 3955#define HCLK_ROT 4056#define HCLK_LCD 4157#define HCLK_TZIC 4258#define HCLK_INTC 4359#define HCLK_MFC 4460#define HCLK_DDR0 4561 62/* PCLK bus clocks. */63#define PCLK_IIC1 4864#define PCLK_IIS2 4965#define PCLK_SKEY 5066#define PCLK_CHIPID 5167#define PCLK_SPI1 5268#define PCLK_SPI0 5369#define PCLK_HSIRX 5470#define PCLK_HSITX 5571#define PCLK_GPIO 5672#define PCLK_IIC0 5773#define PCLK_IIS1 5874#define PCLK_IIS0 5975#define PCLK_AC97 6076#define PCLK_TZPC 6177#define PCLK_TSADC 6278#define PCLK_KEYPAD 6379#define PCLK_IRDA 6480#define PCLK_PCM1 6581#define PCLK_PCM0 6682#define PCLK_PWM 6783#define PCLK_RTC 6884#define PCLK_WDT 6985#define PCLK_UART3 7086#define PCLK_UART2 7187#define PCLK_UART1 7288#define PCLK_UART0 7389#define PCLK_MFC 7490 91/* Special clocks. */92#define SCLK_UHOST 8093#define SCLK_MMC2_48 8194#define SCLK_MMC1_48 8295#define SCLK_MMC0_48 8396#define SCLK_MMC2 8497#define SCLK_MMC1 8598#define SCLK_MMC0 8699#define SCLK_SPI1_48 87100#define SCLK_SPI0_48 88101#define SCLK_SPI1 89102#define SCLK_SPI0 90103#define SCLK_DAC27 91104#define SCLK_TV27 92105#define SCLK_SCALER27 93106#define SCLK_SCALER 94107#define SCLK_LCD27 95108#define SCLK_LCD 96109#define SCLK_FIMC 97110#define SCLK_POST0_27 98111#define SCLK_AUDIO2 99112#define SCLK_POST0 100113#define SCLK_AUDIO1 101114#define SCLK_AUDIO0 102115#define SCLK_SECUR 103116#define SCLK_IRDA 104117#define SCLK_UART 105118#define SCLK_MFC 106119#define SCLK_CAM 107120#define SCLK_JPEG 108121#define SCLK_ONENAND 109122 123/* MEM0 bus clocks - S3C6410-specific. */124#define MEM0_CFCON 112125#define MEM0_ONENAND1 113126#define MEM0_ONENAND0 114127#define MEM0_NFCON 115128#define MEM0_SROM 116129 130/* Muxes. */131#define MOUT_APLL 128132#define MOUT_MPLL 129133#define MOUT_EPLL 130134#define MOUT_MFC 131135#define MOUT_AUDIO0 132136#define MOUT_AUDIO1 133137#define MOUT_UART 134138#define MOUT_SPI0 135139#define MOUT_SPI1 136140#define MOUT_MMC0 137141#define MOUT_MMC1 138142#define MOUT_MMC2 139143#define MOUT_UHOST 140144#define MOUT_IRDA 141145#define MOUT_LCD 142146#define MOUT_SCALER 143147#define MOUT_DAC27 144148#define MOUT_TV27 145149#define MOUT_AUDIO2 146150 151/* Dividers. */152#define DOUT_MPLL 160153#define DOUT_SECUR 161154#define DOUT_CAM 162155#define DOUT_JPEG 163156#define DOUT_MFC 164157#define DOUT_MMC0 165158#define DOUT_MMC1 166159#define DOUT_MMC2 167160#define DOUT_LCD 168161#define DOUT_SCALER 169162#define DOUT_UHOST 170163#define DOUT_SPI0 171164#define DOUT_SPI1 172165#define DOUT_AUDIO0 173166#define DOUT_AUDIO1 174167#define DOUT_UART 175168#define DOUT_IRDA 176169#define DOUT_FIMC 177170#define DOUT_AUDIO2 178171 172/* Total number of clocks. */173#define NR_CLKS (DOUT_AUDIO2 + 1)174 175#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C64XX_CLOCK_H */176