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1/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */2/*3 * Copyright (C) 2023 Sophgo Ltd.4 */5 6#ifndef __DT_BINDINGS_SOPHGO_CV1800_CLK_H__7#define __DT_BINDINGS_SOPHGO_CV1800_CLK_H__8 9#define CLK_MPLL 010#define CLK_TPLL 111#define CLK_FPLL 212#define CLK_MIPIMPLL 313#define CLK_A0PLL 414#define CLK_DISPPLL 515#define CLK_CAM0PLL 616#define CLK_CAM1PLL 717 18#define CLK_MIPIMPLL_D3 819#define CLK_CAM0PLL_D2 920#define CLK_CAM0PLL_D3 1021 22#define CLK_TPU 1123#define CLK_TPU_FAB 1224#define CLK_AHB_ROM 1325#define CLK_DDR_AXI_REG 1426#define CLK_RTC_25M 1527#define CLK_SRC_RTC_SYS_0 1628#define CLK_TEMPSEN 1729#define CLK_SARADC 1830#define CLK_EFUSE 1931#define CLK_APB_EFUSE 2032#define CLK_DEBUG 2133#define CLK_AP_DEBUG 2234#define CLK_XTAL_MISC 2335#define CLK_AXI4_EMMC 2436#define CLK_EMMC 2537#define CLK_EMMC_100K 2638#define CLK_AXI4_SD0 2739#define CLK_SD0 2840#define CLK_SD0_100K 2941#define CLK_AXI4_SD1 3042#define CLK_SD1 3143#define CLK_SD1_100K 3244#define CLK_SPI_NAND 3345#define CLK_ETH0_500M 3446#define CLK_AXI4_ETH0 3547#define CLK_ETH1_500M 3648#define CLK_AXI4_ETH1 3749#define CLK_APB_GPIO 3850#define CLK_APB_GPIO_INTR 3951#define CLK_GPIO_DB 4052#define CLK_AHB_SF 4153#define CLK_AHB_SF1 4254#define CLK_A24M 4355#define CLK_AUDSRC 4456#define CLK_APB_AUDSRC 4557#define CLK_SDMA_AXI 4658#define CLK_SDMA_AUD0 4759#define CLK_SDMA_AUD1 4860#define CLK_SDMA_AUD2 4961#define CLK_SDMA_AUD3 5062#define CLK_I2C 5163#define CLK_APB_I2C 5264#define CLK_APB_I2C0 5365#define CLK_APB_I2C1 5466#define CLK_APB_I2C2 5567#define CLK_APB_I2C3 5668#define CLK_APB_I2C4 5769#define CLK_APB_WDT 5870#define CLK_PWM_SRC 5971#define CLK_PWM 6072#define CLK_SPI 6173#define CLK_APB_SPI0 6274#define CLK_APB_SPI1 6375#define CLK_APB_SPI2 6476#define CLK_APB_SPI3 6577#define CLK_1M 6678#define CLK_CAM0_200 6779#define CLK_PM 6880#define CLK_TIMER0 6981#define CLK_TIMER1 7082#define CLK_TIMER2 7183#define CLK_TIMER3 7284#define CLK_TIMER4 7385#define CLK_TIMER5 7486#define CLK_TIMER6 7587#define CLK_TIMER7 7688#define CLK_UART0 7789#define CLK_APB_UART0 7890#define CLK_UART1 7991#define CLK_APB_UART1 8092#define CLK_UART2 8193#define CLK_APB_UART2 8294#define CLK_UART3 8395#define CLK_APB_UART3 8496#define CLK_UART4 8597#define CLK_APB_UART4 8698#define CLK_APB_I2S0 8799#define CLK_APB_I2S1 88100#define CLK_APB_I2S2 89101#define CLK_APB_I2S3 90102#define CLK_AXI4_USB 91103#define CLK_APB_USB 92104#define CLK_USB_125M 93105#define CLK_USB_33K 94106#define CLK_USB_12M 95107#define CLK_AXI4 96108#define CLK_AXI6 97109#define CLK_DSI_ESC 98110#define CLK_AXI_VIP 99111#define CLK_SRC_VIP_SYS_0 100112#define CLK_SRC_VIP_SYS_1 101113#define CLK_SRC_VIP_SYS_2 102114#define CLK_SRC_VIP_SYS_3 103115#define CLK_SRC_VIP_SYS_4 104116#define CLK_CSI_BE_VIP 105117#define CLK_CSI_MAC0_VIP 106118#define CLK_CSI_MAC1_VIP 107119#define CLK_CSI_MAC2_VIP 108120#define CLK_CSI0_RX_VIP 109121#define CLK_CSI1_RX_VIP 110122#define CLK_ISP_TOP_VIP 111123#define CLK_IMG_D_VIP 112124#define CLK_IMG_V_VIP 113125#define CLK_SC_TOP_VIP 114126#define CLK_SC_D_VIP 115127#define CLK_SC_V1_VIP 116128#define CLK_SC_V2_VIP 117129#define CLK_SC_V3_VIP 118130#define CLK_DWA_VIP 119131#define CLK_BT_VIP 120132#define CLK_DISP_VIP 121133#define CLK_DSI_MAC_VIP 122134#define CLK_LVDS0_VIP 123135#define CLK_LVDS1_VIP 124136#define CLK_PAD_VI_VIP 125137#define CLK_PAD_VI1_VIP 126138#define CLK_PAD_VI2_VIP 127139#define CLK_CFG_REG_VIP 128140#define CLK_VIP_IP0 129141#define CLK_VIP_IP1 130142#define CLK_VIP_IP2 131143#define CLK_VIP_IP3 132144#define CLK_IVE_VIP 133145#define CLK_RAW_VIP 134146#define CLK_OSDC_VIP 135147#define CLK_CAM0_VIP 136148#define CLK_AXI_VIDEO_CODEC 137149#define CLK_VC_SRC0 138150#define CLK_VC_SRC1 139151#define CLK_VC_SRC2 140152#define CLK_H264C 141153#define CLK_APB_H264C 142154#define CLK_H265C 143155#define CLK_APB_H265C 144156#define CLK_JPEG 145157#define CLK_APB_JPEG 146158#define CLK_CAM0 147159#define CLK_CAM1 148160#define CLK_WGN 149161#define CLK_WGN0 150162#define CLK_WGN1 151163#define CLK_WGN2 152164#define CLK_KEYSCAN 153165#define CLK_CFG_REG_VC 154166#define CLK_C906_0 155167#define CLK_C906_1 156168#define CLK_A53 157169#define CLK_CPU_AXI0 158170#define CLK_CPU_GIC 159171#define CLK_XTAL_AP 160172 173// Only for CV181x174#define CLK_DISP_SRC_VIP 161175 176#endif /* __DT_BINDINGS_SOPHGO_CV1800_CLK_H__ */177