42 lines · c
1/* SPDX-License-Identifier: GPL-2.0 OR MIT */2/*3 * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>4 */5 6#ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__7#define __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__8 9#define JH7100_AUDCLK_ADC_MCLK 010#define JH7100_AUDCLK_I2S1_MCLK 111#define JH7100_AUDCLK_I2SADC_APB 212#define JH7100_AUDCLK_I2SADC_BCLK 313#define JH7100_AUDCLK_I2SADC_BCLK_N 414#define JH7100_AUDCLK_I2SADC_LRCLK 515#define JH7100_AUDCLK_PDM_APB 616#define JH7100_AUDCLK_PDM_MCLK 717#define JH7100_AUDCLK_I2SVAD_APB 818#define JH7100_AUDCLK_SPDIF 919#define JH7100_AUDCLK_SPDIF_APB 1020#define JH7100_AUDCLK_PWMDAC_APB 1121#define JH7100_AUDCLK_DAC_MCLK 1222#define JH7100_AUDCLK_I2SDAC_APB 1323#define JH7100_AUDCLK_I2SDAC_BCLK 1424#define JH7100_AUDCLK_I2SDAC_BCLK_N 1525#define JH7100_AUDCLK_I2SDAC_LRCLK 1626#define JH7100_AUDCLK_I2S1_APB 1727#define JH7100_AUDCLK_I2S1_BCLK 1828#define JH7100_AUDCLK_I2S1_BCLK_N 1929#define JH7100_AUDCLK_I2S1_LRCLK 2030#define JH7100_AUDCLK_I2SDAC16K_APB 2131#define JH7100_AUDCLK_APB0_BUS 2232#define JH7100_AUDCLK_DMA1P_AHB 2333#define JH7100_AUDCLK_USB_APB 2434#define JH7100_AUDCLK_USB_LPM 2535#define JH7100_AUDCLK_USB_STB 2636#define JH7100_AUDCLK_APB_EN 2737#define JH7100_AUDCLK_VAD_MEM 2838 39#define JH7100_AUDCLK_END 2940 41#endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7100_AUDIO_H__ */42