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1/* SPDX-License-Identifier: GPL-2.0-only */2/*3 * stm32fx-clock.h4 *5 * Copyright (C) 2016 STMicroelectronics6 * Author: Gabriel Fernandez for STMicroelectronics.7 */8 9/*10 * List of clocks which are not derived from system clock (SYSCLOCK)11 *12 * The index of these clocks is the secondary index of DT bindings13 * (see Documentation/devicetree/bindings/clock/st,stm32-rcc.txt)14 *15 * e.g:16 <assigned-clocks = <&rcc 1 CLK_LSE>;17*/18 19#ifndef _DT_BINDINGS_CLK_STMFX_H20#define _DT_BINDINGS_CLK_STMFX_H21 22#define SYSTICK 023#define FCLK 124#define CLK_LSI 225#define CLK_LSE 326#define CLK_HSE_RTC 427#define CLK_RTC 528#define PLL_VCO_I2S 629#define PLL_VCO_SAI 730#define CLK_LCD 831#define CLK_I2S 932#define CLK_SAI1 1033#define CLK_SAI2 1134#define CLK_I2SQ_PDIV 1235#define CLK_SAIQ_PDIV 1336#define CLK_HSI 1437#define CLK_SYSCLK 1538#define CLK_F469_DSI 1639 40#define END_PRIMARY_CLK 1741 42#define CLK_HDMI_CEC 1643#define CLK_SPDIF 1744#define CLK_USART1 1845#define CLK_USART2 1946#define CLK_USART3 2047#define CLK_UART4 2148#define CLK_UART5 2249#define CLK_USART6 2350#define CLK_UART7 2451#define CLK_UART8 2552#define CLK_I2C1 2653#define CLK_I2C2 2754#define CLK_I2C3 2855#define CLK_I2C4 2956#define CLK_LPTIMER 3057#define CLK_PLL_SRC 3158#define CLK_DFSDM1 3259#define CLK_ADFSDM1 3360#define CLK_F769_DSI 3461#define END_PRIMARY_CLK_F7 3562 63#endif64