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1/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */2/*3 * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>4 */5 6#ifndef _DT_BINDINGS_CLK_SUN50I_H6_H_7#define _DT_BINDINGS_CLK_SUN50I_H6_H_8 9#define CLK_PLL_PERIPH0 310 11#define CLK_CPUX 2112 13#define CLK_APB1 2614 15#define CLK_DE 2916#define CLK_BUS_DE 3017#define CLK_DEINTERLACE 3118#define CLK_BUS_DEINTERLACE 3219#define CLK_GPU 3320#define CLK_BUS_GPU 3421#define CLK_CE 3522#define CLK_BUS_CE 3623#define CLK_VE 3724#define CLK_BUS_VE 3825#define CLK_EMCE 3926#define CLK_BUS_EMCE 4027#define CLK_VP9 4128#define CLK_BUS_VP9 4229#define CLK_BUS_DMA 4330#define CLK_BUS_MSGBOX 4431#define CLK_BUS_SPINLOCK 4532#define CLK_BUS_HSTIMER 4633#define CLK_AVS 4734#define CLK_BUS_DBG 4835#define CLK_BUS_PSI 4936#define CLK_BUS_PWM 5037#define CLK_BUS_IOMMU 5138 39#define CLK_MBUS_DMA 5340#define CLK_MBUS_VE 5441#define CLK_MBUS_CE 5542#define CLK_MBUS_TS 5643#define CLK_MBUS_NAND 5744#define CLK_MBUS_CSI 5845#define CLK_MBUS_DEINTERLACE 5946 47#define CLK_NAND0 6148#define CLK_NAND1 6249#define CLK_BUS_NAND 6350#define CLK_MMC0 6451#define CLK_MMC1 6552#define CLK_MMC2 6653#define CLK_BUS_MMC0 6754#define CLK_BUS_MMC1 6855#define CLK_BUS_MMC2 6956#define CLK_BUS_UART0 7057#define CLK_BUS_UART1 7158#define CLK_BUS_UART2 7259#define CLK_BUS_UART3 7360#define CLK_BUS_I2C0 7461#define CLK_BUS_I2C1 7562#define CLK_BUS_I2C2 7663#define CLK_BUS_I2C3 7764#define CLK_BUS_SCR0 7865#define CLK_BUS_SCR1 7966#define CLK_SPI0 8067#define CLK_SPI1 8168#define CLK_BUS_SPI0 8269#define CLK_BUS_SPI1 8370#define CLK_BUS_EMAC 8471#define CLK_TS 8572#define CLK_BUS_TS 8673#define CLK_IR_TX 8774#define CLK_BUS_IR_TX 8875#define CLK_BUS_THS 8976#define CLK_I2S3 9077#define CLK_I2S0 9178#define CLK_I2S1 9279#define CLK_I2S2 9380#define CLK_BUS_I2S0 9481#define CLK_BUS_I2S1 9582#define CLK_BUS_I2S2 9683#define CLK_BUS_I2S3 9784#define CLK_SPDIF 9885#define CLK_BUS_SPDIF 9986#define CLK_DMIC 10087#define CLK_BUS_DMIC 10188#define CLK_AUDIO_HUB 10289#define CLK_BUS_AUDIO_HUB 10390#define CLK_USB_OHCI0 10491#define CLK_USB_PHY0 10592#define CLK_USB_PHY1 10693#define CLK_USB_OHCI3 10794#define CLK_USB_PHY3 10895#define CLK_USB_HSIC_12M 10996#define CLK_USB_HSIC 11097#define CLK_BUS_OHCI0 11198#define CLK_BUS_OHCI3 11299#define CLK_BUS_EHCI0 113100#define CLK_BUS_XHCI 114101#define CLK_BUS_EHCI3 115102#define CLK_BUS_OTG 116103#define CLK_PCIE_REF_100M 117104#define CLK_PCIE_REF 118105#define CLK_PCIE_REF_OUT 119106#define CLK_PCIE_MAXI 120107#define CLK_PCIE_AUX 121108#define CLK_BUS_PCIE 122109#define CLK_HDMI 123110#define CLK_HDMI_SLOW 124111#define CLK_HDMI_CEC 125112#define CLK_BUS_HDMI 126113#define CLK_BUS_TCON_TOP 127114#define CLK_TCON_LCD0 128115#define CLK_BUS_TCON_LCD0 129116#define CLK_TCON_TV0 130117#define CLK_BUS_TCON_TV0 131118#define CLK_CSI_CCI 132119#define CLK_CSI_TOP 133120#define CLK_CSI_MCLK 134121#define CLK_BUS_CSI 135122#define CLK_HDCP 136123#define CLK_BUS_HDCP 137124 125#endif /* _DT_BINDINGS_CLK_SUN50I_H6_H_ */126