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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright 2016 Maxime Ripard4 *5 * Maxime Ripard <maxime.ripard@free-electrons.com>6 */7 8#ifndef _DT_BINDINGS_CLK_SUN5I_H_9#define _DT_BINDINGS_CLK_SUN5I_H_10 11#define CLK_HOSC 112 13#define CLK_PLL_VIDEO0_2X 914 15#define CLK_PLL_VIDEO1_2X 1616#define CLK_CPU 1717 18#define CLK_AHB_OTG 2319#define CLK_AHB_EHCI 2420#define CLK_AHB_OHCI 2521#define CLK_AHB_SS 2622#define CLK_AHB_DMA 2723#define CLK_AHB_BIST 2824#define CLK_AHB_MMC0 2925#define CLK_AHB_MMC1 3026#define CLK_AHB_MMC2 3127#define CLK_AHB_NAND 3228#define CLK_AHB_SDRAM 3329#define CLK_AHB_EMAC 3430#define CLK_AHB_TS 3531#define CLK_AHB_SPI0 3632#define CLK_AHB_SPI1 3733#define CLK_AHB_SPI2 3834#define CLK_AHB_GPS 3935#define CLK_AHB_HSTIMER 4036#define CLK_AHB_VE 4137#define CLK_AHB_TVE 4238#define CLK_AHB_LCD 4339#define CLK_AHB_CSI 4440#define CLK_AHB_HDMI 4541#define CLK_AHB_DE_BE 4642#define CLK_AHB_DE_FE 4743#define CLK_AHB_IEP 4844#define CLK_AHB_GPU 4945#define CLK_APB0_CODEC 5046#define CLK_APB0_SPDIF 5147#define CLK_APB0_I2S 5248#define CLK_APB0_PIO 5349#define CLK_APB0_IR 5450#define CLK_APB0_KEYPAD 5551#define CLK_APB1_I2C0 5652#define CLK_APB1_I2C1 5753#define CLK_APB1_I2C2 5854#define CLK_APB1_UART0 5955#define CLK_APB1_UART1 6056#define CLK_APB1_UART2 6157#define CLK_APB1_UART3 6258#define CLK_NAND 6359#define CLK_MMC0 6460#define CLK_MMC1 6561#define CLK_MMC2 6662#define CLK_TS 6763#define CLK_SS 6864#define CLK_SPI0 6965#define CLK_SPI1 7066#define CLK_SPI2 7167#define CLK_IR 7268#define CLK_I2S 7369#define CLK_SPDIF 7470#define CLK_KEYPAD 7571#define CLK_USB_OHCI 7672#define CLK_USB_PHY0 7773#define CLK_USB_PHY1 7874#define CLK_GPS 7975#define CLK_DRAM_VE 8076#define CLK_DRAM_CSI 8177#define CLK_DRAM_TS 8278#define CLK_DRAM_TVE 8379#define CLK_DRAM_DE_FE 8480#define CLK_DRAM_DE_BE 8581#define CLK_DRAM_ACE 8682#define CLK_DRAM_IEP 8783#define CLK_DE_BE 8884#define CLK_DE_FE 8985#define CLK_TCON_CH0 9086 87#define CLK_TCON_CH1 9288#define CLK_CSI 9389#define CLK_VE 9490#define CLK_CODEC 9591#define CLK_AVS 9692#define CLK_HDMI 9793#define CLK_GPU 9894#define CLK_MBUS 9995#define CLK_IEP 10096 97#endif /* _DT_BINDINGS_CLK_SUN5I_H_ */98