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1/*2 * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>3 *4 * This file is dual-licensed: you can use it either under the terms5 * of the GPL or the X11 license, at your option. Note that this dual6 * licensing only applies to this file, and not this project as a7 * whole.8 *9 * a) This file is free software; you can redistribute it and/or10 * modify it under the terms of the GNU General Public License as11 * published by the Free Software Foundation; either version 2 of the12 * License, or (at your option) any later version.13 *14 * This file is distributed in the hope that it will be useful,15 * but WITHOUT ANY WARRANTY; without even the implied warranty of16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the17 * GNU General Public License for more details.18 *19 * Or, alternatively,20 *21 * b) Permission is hereby granted, free of charge, to any person22 * obtaining a copy of this software and associated documentation23 * files (the "Software"), to deal in the Software without24 * restriction, including without limitation the rights to use,25 * copy, modify, merge, publish, distribute, sublicense, and/or26 * sell copies of the Software, and to permit persons to whom the27 * Software is furnished to do so, subject to the following28 * conditions:29 *30 * The above copyright notice and this permission notice shall be31 * included in all copies or substantial portions of the Software.32 *33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR40 * OTHER DEALINGS IN THE SOFTWARE.41 */42 43#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_44#define _DT_BINDINGS_CLK_SUN8I_H3_H_45 46#define CLK_PLL_VIDEO 647 48#define CLK_PLL_PERIPH0 949 50#define CLK_CPUX 1451 52#define CLK_BUS_CE 2053#define CLK_BUS_DMA 2154#define CLK_BUS_MMC0 2255#define CLK_BUS_MMC1 2356#define CLK_BUS_MMC2 2457#define CLK_BUS_NAND 2558#define CLK_BUS_DRAM 2659#define CLK_BUS_EMAC 2760#define CLK_BUS_TS 2861#define CLK_BUS_HSTIMER 2962#define CLK_BUS_SPI0 3063#define CLK_BUS_SPI1 3164#define CLK_BUS_OTG 3265#define CLK_BUS_EHCI0 3366#define CLK_BUS_EHCI1 3467#define CLK_BUS_EHCI2 3568#define CLK_BUS_EHCI3 3669#define CLK_BUS_OHCI0 3770#define CLK_BUS_OHCI1 3871#define CLK_BUS_OHCI2 3972#define CLK_BUS_OHCI3 4073#define CLK_BUS_VE 4174#define CLK_BUS_TCON0 4275#define CLK_BUS_TCON1 4376#define CLK_BUS_DEINTERLACE 4477#define CLK_BUS_CSI 4578#define CLK_BUS_TVE 4679#define CLK_BUS_HDMI 4780#define CLK_BUS_DE 4881#define CLK_BUS_GPU 4982#define CLK_BUS_MSGBOX 5083#define CLK_BUS_SPINLOCK 5184#define CLK_BUS_CODEC 5285#define CLK_BUS_SPDIF 5386#define CLK_BUS_PIO 5487#define CLK_BUS_THS 5588#define CLK_BUS_I2S0 5689#define CLK_BUS_I2S1 5790#define CLK_BUS_I2S2 5891#define CLK_BUS_I2C0 5992#define CLK_BUS_I2C1 6093#define CLK_BUS_I2C2 6194#define CLK_BUS_UART0 6295#define CLK_BUS_UART1 6396#define CLK_BUS_UART2 6497#define CLK_BUS_UART3 6598#define CLK_BUS_SCR0 6699#define CLK_BUS_EPHY 67100#define CLK_BUS_DBG 68101 102#define CLK_THS 69103#define CLK_NAND 70104#define CLK_MMC0 71105#define CLK_MMC0_SAMPLE 72106#define CLK_MMC0_OUTPUT 73107#define CLK_MMC1 74108#define CLK_MMC1_SAMPLE 75109#define CLK_MMC1_OUTPUT 76110#define CLK_MMC2 77111#define CLK_MMC2_SAMPLE 78112#define CLK_MMC2_OUTPUT 79113#define CLK_TS 80114#define CLK_CE 81115#define CLK_SPI0 82116#define CLK_SPI1 83117#define CLK_I2S0 84118#define CLK_I2S1 85119#define CLK_I2S2 86120#define CLK_SPDIF 87121#define CLK_USB_PHY0 88122#define CLK_USB_PHY1 89123#define CLK_USB_PHY2 90124#define CLK_USB_PHY3 91125#define CLK_USB_OHCI0 92126#define CLK_USB_OHCI1 93127#define CLK_USB_OHCI2 94128#define CLK_USB_OHCI3 95129#define CLK_DRAM 96130#define CLK_DRAM_VE 97131#define CLK_DRAM_CSI 98132#define CLK_DRAM_DEINTERLACE 99133#define CLK_DRAM_TS 100134#define CLK_DE 101135#define CLK_TCON0 102136#define CLK_TVE 103137#define CLK_DEINTERLACE 104138#define CLK_CSI_MISC 105139#define CLK_CSI_SCLK 106140#define CLK_CSI_MCLK 107141#define CLK_VE 108142#define CLK_AC_DIG 109143#define CLK_AVS 110144#define CLK_HDMI 111145#define CLK_HDMI_DDC 112146#define CLK_MBUS 113147#define CLK_GPU 114148 149/* New clocks imported in H5 */150#define CLK_BUS_SCR1 115151 152#endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */153