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1/* SPDX-License-Identifier: GPL-2.0-or-later */2/*3 * Copyright 2013 Freescale Semiconductor, Inc.4 */5 6#ifndef __DT_BINDINGS_CLOCK_VF610_H7#define __DT_BINDINGS_CLOCK_VF610_H8 9#define VF610_CLK_DUMMY 010#define VF610_CLK_SIRC_128K 111#define VF610_CLK_SIRC_32K 212#define VF610_CLK_FIRC 313#define VF610_CLK_SXOSC 414#define VF610_CLK_FXOSC 515#define VF610_CLK_FXOSC_HALF 616#define VF610_CLK_SLOW_CLK_SEL 717#define VF610_CLK_FASK_CLK_SEL 818#define VF610_CLK_AUDIO_EXT 919#define VF610_CLK_ENET_EXT 1020#define VF610_CLK_PLL1_SYS 1121#define VF610_CLK_PLL1_PFD1 1222#define VF610_CLK_PLL1_PFD2 1323#define VF610_CLK_PLL1_PFD3 1424#define VF610_CLK_PLL1_PFD4 1525#define VF610_CLK_PLL2_BUS 1626#define VF610_CLK_PLL2_PFD1 1727#define VF610_CLK_PLL2_PFD2 1828#define VF610_CLK_PLL2_PFD3 1929#define VF610_CLK_PLL2_PFD4 2030#define VF610_CLK_PLL3_USB_OTG 2131#define VF610_CLK_PLL3_PFD1 2232#define VF610_CLK_PLL3_PFD2 2333#define VF610_CLK_PLL3_PFD3 2434#define VF610_CLK_PLL3_PFD4 2535#define VF610_CLK_PLL4_AUDIO 2636#define VF610_CLK_PLL5_ENET 2737#define VF610_CLK_PLL6_VIDEO 2838#define VF610_CLK_PLL3_MAIN_DIV 2939#define VF610_CLK_PLL4_MAIN_DIV 3040#define VF610_CLK_PLL6_MAIN_DIV 3141#define VF610_CLK_PLL1_PFD_SEL 3242#define VF610_CLK_PLL2_PFD_SEL 3343#define VF610_CLK_SYS_SEL 3444#define VF610_CLK_DDR_SEL 3545#define VF610_CLK_SYS_BUS 3646#define VF610_CLK_PLATFORM_BUS 3747#define VF610_CLK_IPG_BUS 3848#define VF610_CLK_UART0 3949#define VF610_CLK_UART1 4050#define VF610_CLK_UART2 4151#define VF610_CLK_UART3 4252#define VF610_CLK_UART4 4353#define VF610_CLK_UART5 4454#define VF610_CLK_PIT 4555#define VF610_CLK_I2C0 4656#define VF610_CLK_I2C1 4757#define VF610_CLK_I2C2 4858#define VF610_CLK_I2C3 4959#define VF610_CLK_FTM0_EXT_SEL 5060#define VF610_CLK_FTM0_FIX_SEL 5161#define VF610_CLK_FTM0_EXT_FIX_EN 5262#define VF610_CLK_FTM1_EXT_SEL 5363#define VF610_CLK_FTM1_FIX_SEL 5464#define VF610_CLK_FTM1_EXT_FIX_EN 5565#define VF610_CLK_FTM2_EXT_SEL 5666#define VF610_CLK_FTM2_FIX_SEL 5767#define VF610_CLK_FTM2_EXT_FIX_EN 5868#define VF610_CLK_FTM3_EXT_SEL 5969#define VF610_CLK_FTM3_FIX_SEL 6070#define VF610_CLK_FTM3_EXT_FIX_EN 6171#define VF610_CLK_FTM0 6272#define VF610_CLK_FTM1 6373#define VF610_CLK_FTM2 6474#define VF610_CLK_FTM3 6575#define VF610_CLK_ENET_50M 6676#define VF610_CLK_ENET_25M 6777#define VF610_CLK_ENET_SEL 6878#define VF610_CLK_ENET 6979#define VF610_CLK_ENET_TS_SEL 7080#define VF610_CLK_ENET_TS 7181#define VF610_CLK_DSPI0 7282#define VF610_CLK_DSPI1 7383#define VF610_CLK_DSPI2 7484#define VF610_CLK_DSPI3 7585#define VF610_CLK_WDT 7686#define VF610_CLK_ESDHC0_SEL 7787#define VF610_CLK_ESDHC0_EN 7888#define VF610_CLK_ESDHC0_DIV 7989#define VF610_CLK_ESDHC0 8090#define VF610_CLK_ESDHC1_SEL 8191#define VF610_CLK_ESDHC1_EN 8292#define VF610_CLK_ESDHC1_DIV 8393#define VF610_CLK_ESDHC1 8494#define VF610_CLK_DCU0_SEL 8595#define VF610_CLK_DCU0_EN 8696#define VF610_CLK_DCU0_DIV 8797#define VF610_CLK_DCU0 8898#define VF610_CLK_DCU1_SEL 8999#define VF610_CLK_DCU1_EN 90100#define VF610_CLK_DCU1_DIV 91101#define VF610_CLK_DCU1 92102#define VF610_CLK_ESAI_SEL 93103#define VF610_CLK_ESAI_EN 94104#define VF610_CLK_ESAI_DIV 95105#define VF610_CLK_ESAI 96106#define VF610_CLK_SAI0_SEL 97107#define VF610_CLK_SAI0_EN 98108#define VF610_CLK_SAI0_DIV 99109#define VF610_CLK_SAI0 100110#define VF610_CLK_SAI1_SEL 101111#define VF610_CLK_SAI1_EN 102112#define VF610_CLK_SAI1_DIV 103113#define VF610_CLK_SAI1 104114#define VF610_CLK_SAI2_SEL 105115#define VF610_CLK_SAI2_EN 106116#define VF610_CLK_SAI2_DIV 107117#define VF610_CLK_SAI2 108118#define VF610_CLK_SAI3_SEL 109119#define VF610_CLK_SAI3_EN 110120#define VF610_CLK_SAI3_DIV 111121#define VF610_CLK_SAI3 112122#define VF610_CLK_USBC0 113123#define VF610_CLK_USBC1 114124#define VF610_CLK_QSPI0_SEL 115125#define VF610_CLK_QSPI0_EN 116126#define VF610_CLK_QSPI0_X4_DIV 117127#define VF610_CLK_QSPI0_X2_DIV 118128#define VF610_CLK_QSPI0_X1_DIV 119129#define VF610_CLK_QSPI1_SEL 120130#define VF610_CLK_QSPI1_EN 121131#define VF610_CLK_QSPI1_X4_DIV 122132#define VF610_CLK_QSPI1_X2_DIV 123133#define VF610_CLK_QSPI1_X1_DIV 124134#define VF610_CLK_QSPI0 125135#define VF610_CLK_QSPI1 126136#define VF610_CLK_NFC_SEL 127137#define VF610_CLK_NFC_EN 128138#define VF610_CLK_NFC_PRE_DIV 129139#define VF610_CLK_NFC_FRAC_DIV 130140#define VF610_CLK_NFC_INV 131141#define VF610_CLK_NFC 132142#define VF610_CLK_VADC_SEL 133143#define VF610_CLK_VADC_EN 134144#define VF610_CLK_VADC_DIV 135145#define VF610_CLK_VADC_DIV_HALF 136146#define VF610_CLK_VADC 137147#define VF610_CLK_ADC0 138148#define VF610_CLK_ADC1 139149#define VF610_CLK_DAC0 140150#define VF610_CLK_DAC1 141151#define VF610_CLK_FLEXCAN0 142152#define VF610_CLK_FLEXCAN1 143153#define VF610_CLK_ASRC 144154#define VF610_CLK_GPU_SEL 145155#define VF610_CLK_GPU_EN 146156#define VF610_CLK_GPU2D 147157#define VF610_CLK_ENET0 148158#define VF610_CLK_ENET1 149159#define VF610_CLK_DMAMUX0 150160#define VF610_CLK_DMAMUX1 151161#define VF610_CLK_DMAMUX2 152162#define VF610_CLK_DMAMUX3 153163#define VF610_CLK_FLEXCAN0_EN 154164#define VF610_CLK_FLEXCAN1_EN 155165#define VF610_CLK_PLL7_USB_HOST 156166#define VF610_CLK_USBPHY0 157167#define VF610_CLK_USBPHY1 158168#define VF610_CLK_LVDS1_IN 159169#define VF610_CLK_ANACLK1 160170#define VF610_CLK_PLL1_BYPASS_SRC 161171#define VF610_CLK_PLL2_BYPASS_SRC 162172#define VF610_CLK_PLL3_BYPASS_SRC 163173#define VF610_CLK_PLL4_BYPASS_SRC 164174#define VF610_CLK_PLL5_BYPASS_SRC 165175#define VF610_CLK_PLL6_BYPASS_SRC 166176#define VF610_CLK_PLL7_BYPASS_SRC 167177#define VF610_CLK_PLL1 168178#define VF610_CLK_PLL2 169179#define VF610_CLK_PLL3 170180#define VF610_CLK_PLL4 171181#define VF610_CLK_PLL5 172182#define VF610_CLK_PLL6 173183#define VF610_CLK_PLL7 174184#define VF610_PLL1_BYPASS 175185#define VF610_PLL2_BYPASS 176186#define VF610_PLL3_BYPASS 177187#define VF610_PLL4_BYPASS 178188#define VF610_PLL5_BYPASS 179189#define VF610_PLL6_BYPASS 180190#define VF610_PLL7_BYPASS 181191#define VF610_CLK_SNVS 182192#define VF610_CLK_DAP 183193#define VF610_CLK_OCOTP 184194#define VF610_CLK_DDRMC 185195#define VF610_CLK_WKPU 186196#define VF610_CLK_TCON0 187197#define VF610_CLK_TCON1 188198#define VF610_CLK_CAAM 189199#define VF610_CLK_CRC 190200#define VF610_CLK_END 191201 202#endif /* __DT_BINDINGS_CLOCK_VF610_H */203