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1#ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__2#define __DT_BINDINGS_DMA_JZ4780_DMA_H__3 4/*5 * Request type numbers for the JZ4780 DMA controller (written to the DRTn6 * register for the channel).7 */8#define JZ4780_DMA_I2S1_TX 0x49#define JZ4780_DMA_I2S1_RX 0x510#define JZ4780_DMA_I2S0_TX 0x611#define JZ4780_DMA_I2S0_RX 0x712#define JZ4780_DMA_AUTO 0x813#define JZ4780_DMA_SADC_RX 0x914#define JZ4780_DMA_UART4_TX 0xc15#define JZ4780_DMA_UART4_RX 0xd16#define JZ4780_DMA_UART3_TX 0xe17#define JZ4780_DMA_UART3_RX 0xf18#define JZ4780_DMA_UART2_TX 0x1019#define JZ4780_DMA_UART2_RX 0x1120#define JZ4780_DMA_UART1_TX 0x1221#define JZ4780_DMA_UART1_RX 0x1322#define JZ4780_DMA_UART0_TX 0x1423#define JZ4780_DMA_UART0_RX 0x1524#define JZ4780_DMA_SSI0_TX 0x1625#define JZ4780_DMA_SSI0_RX 0x1726#define JZ4780_DMA_SSI1_TX 0x1827#define JZ4780_DMA_SSI1_RX 0x1928#define JZ4780_DMA_MSC0_TX 0x1a29#define JZ4780_DMA_MSC0_RX 0x1b30#define JZ4780_DMA_MSC1_TX 0x1c31#define JZ4780_DMA_MSC1_RX 0x1d32#define JZ4780_DMA_MSC2_TX 0x1e33#define JZ4780_DMA_MSC2_RX 0x1f34#define JZ4780_DMA_PCM0_TX 0x2035#define JZ4780_DMA_PCM0_RX 0x2136#define JZ4780_DMA_SMB0_TX 0x2437#define JZ4780_DMA_SMB0_RX 0x2538#define JZ4780_DMA_SMB1_TX 0x2639#define JZ4780_DMA_SMB1_RX 0x2740#define JZ4780_DMA_SMB2_TX 0x2841#define JZ4780_DMA_SMB2_RX 0x2942#define JZ4780_DMA_SMB3_TX 0x2a43#define JZ4780_DMA_SMB3_RX 0x2b44#define JZ4780_DMA_SMB4_TX 0x2c45#define JZ4780_DMA_SMB4_RX 0x2d46#define JZ4780_DMA_DES_TX 0x2e47#define JZ4780_DMA_DES_RX 0x2f48 49#endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */50