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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Copyright (c) 2019 MediaTek Inc.4 * Author: Bibby Hsieh <bibby.hsieh@mediatek.com>5 *6 */7 8#ifndef _DT_BINDINGS_GCE_MT8183_H9#define _DT_BINDINGS_GCE_MT8183_H10 11#define CMDQ_NO_TIMEOUT 0xffffffff12 13/* GCE HW thread priority */14#define CMDQ_THR_PRIO_LOWEST 015#define CMDQ_THR_PRIO_HIGHEST 116 17/* GCE SUBSYS */18#define SUBSYS_1300XXXX 019#define SUBSYS_1400XXXX 120#define SUBSYS_1401XXXX 221#define SUBSYS_1402XXXX 322#define SUBSYS_1502XXXX 423#define SUBSYS_1880XXXX 524#define SUBSYS_1881XXXX 625#define SUBSYS_1882XXXX 726#define SUBSYS_1883XXXX 827#define SUBSYS_1884XXXX 928#define SUBSYS_1000XXXX 1029#define SUBSYS_1001XXXX 1130#define SUBSYS_1002XXXX 1231#define SUBSYS_1003XXXX 1332#define SUBSYS_1004XXXX 1433#define SUBSYS_1005XXXX 1534#define SUBSYS_1020XXXX 1635#define SUBSYS_1028XXXX 1736#define SUBSYS_1700XXXX 1837#define SUBSYS_1701XXXX 1938#define SUBSYS_1702XXXX 2039#define SUBSYS_1703XXXX 2140#define SUBSYS_1800XXXX 2241#define SUBSYS_1801XXXX 2342#define SUBSYS_1802XXXX 2443#define SUBSYS_1804XXXX 2544#define SUBSYS_1805XXXX 2645#define SUBSYS_1808XXXX 2746#define SUBSYS_180aXXXX 2847#define SUBSYS_180bXXXX 2948 49#define CMDQ_EVENT_DISP_RDMA0_SOF 050#define CMDQ_EVENT_DISP_RDMA1_SOF 151#define CMDQ_EVENT_MDP_RDMA0_SOF 252#define CMDQ_EVENT_MDP_RSZ0_SOF 453#define CMDQ_EVENT_MDP_RSZ1_SOF 554#define CMDQ_EVENT_MDP_TDSHP_SOF 655#define CMDQ_EVENT_MDP_WROT0_SOF 756#define CMDQ_EVENT_MDP_WDMA0_SOF 857#define CMDQ_EVENT_DISP_OVL0_SOF 958#define CMDQ_EVENT_DISP_OVL0_2L_SOF 1059#define CMDQ_EVENT_DISP_OVL1_2L_SOF 1160#define CMDQ_EVENT_DISP_WDMA0_SOF 1261#define CMDQ_EVENT_DISP_COLOR0_SOF 1362#define CMDQ_EVENT_DISP_CCORR0_SOF 1463#define CMDQ_EVENT_DISP_AAL0_SOF 1564#define CMDQ_EVENT_DISP_GAMMA0_SOF 1665#define CMDQ_EVENT_DISP_DITHER0_SOF 1766#define CMDQ_EVENT_DISP_PWM0_SOF 1867#define CMDQ_EVENT_DISP_DSI0_SOF 1968#define CMDQ_EVENT_DISP_DPI0_SOF 2069#define CMDQ_EVENT_DISP_RSZ_SOF 2270#define CMDQ_EVENT_MDP_AAL_SOF 2371#define CMDQ_EVENT_MDP_CCORR_SOF 2472#define CMDQ_EVENT_DISP_DBI_SOF 2573#define CMDQ_EVENT_DISP_RDMA0_EOF 2674#define CMDQ_EVENT_DISP_RDMA1_EOF 2775#define CMDQ_EVENT_MDP_RDMA0_EOF 2876#define CMDQ_EVENT_MDP_RSZ0_EOF 3077#define CMDQ_EVENT_MDP_RSZ1_EOF 3178#define CMDQ_EVENT_MDP_TDSHP_EOF 3279#define CMDQ_EVENT_MDP_WROT0_EOF 3380#define CMDQ_EVENT_MDP_WDMA0_EOF 3481#define CMDQ_EVENT_DISP_OVL0_EOF 3582#define CMDQ_EVENT_DISP_OVL0_2L_EOF 3683#define CMDQ_EVENT_DISP_OVL1_2L_EOF 3784#define CMDQ_EVENT_DISP_WDMA0_EOF 3885#define CMDQ_EVENT_DISP_COLOR0_EOF 3986#define CMDQ_EVENT_DISP_CCORR0_EOF 4087#define CMDQ_EVENT_DISP_AAL0_EOF 4188#define CMDQ_EVENT_DISP_GAMMA0_EOF 4289#define CMDQ_EVENT_DISP_DITHER0_EOF 4390#define CMDQ_EVENT_DSI0_EOF 4491#define CMDQ_EVENT_DPI0_EOF 4592#define CMDQ_EVENT_DISP_RSZ_EOF 4793#define CMDQ_EVENT_MDP_AAL_EOF 4894#define CMDQ_EVENT_MDP_CCORR_EOF 4995#define CMDQ_EVENT_DBI_EOF 5096#define CMDQ_EVENT_MUTEX_STREAM_DONE0 13097#define CMDQ_EVENT_MUTEX_STREAM_DONE1 13198#define CMDQ_EVENT_MUTEX_STREAM_DONE2 13299#define CMDQ_EVENT_MUTEX_STREAM_DONE3 133100#define CMDQ_EVENT_MUTEX_STREAM_DONE4 134101#define CMDQ_EVENT_MUTEX_STREAM_DONE5 135102#define CMDQ_EVENT_MUTEX_STREAM_DONE6 136103#define CMDQ_EVENT_MUTEX_STREAM_DONE7 137104#define CMDQ_EVENT_MUTEX_STREAM_DONE8 138105#define CMDQ_EVENT_MUTEX_STREAM_DONE9 139106#define CMDQ_EVENT_MUTEX_STREAM_DONE10 140107#define CMDQ_EVENT_MUTEX_STREAM_DONE11 141108#define CMDQ_EVENT_DISP_RDMA0_BUF_UNDERRUN_EVEN 142109#define CMDQ_EVENT_DISP_RDMA1_BUF_UNDERRUN_EVEN 143110#define CMDQ_EVENT_DSI0_TE_EVENT 144111#define CMDQ_EVENT_DSI0_IRQ_EVENT 145112#define CMDQ_EVENT_DSI0_DONE_EVENT 146113#define CMDQ_EVENT_DISP_WDMA0_SW_RST_DONE 150114#define CMDQ_EVENT_MDP_WDMA_SW_RST_DONE 151115#define CMDQ_EVENT_MDP_WROT0_SW_RST_DONE 152116#define CMDQ_EVENT_MDP_RDMA0_SW_RST_DONE 154117#define CMDQ_EVENT_DISP_OVL0_FRAME_RST_DONE_PULE 155118#define CMDQ_EVENT_DISP_OVL0_2L_FRAME_RST_DONE_ULSE 156119#define CMDQ_EVENT_DISP_OVL1_2L_FRAME_RST_DONE_ULSE 157120#define CMDQ_EVENT_ISP_FRAME_DONE_P2_0 257121#define CMDQ_EVENT_ISP_FRAME_DONE_P2_1 258122#define CMDQ_EVENT_ISP_FRAME_DONE_P2_2 259123#define CMDQ_EVENT_ISP_FRAME_DONE_P2_3 260124#define CMDQ_EVENT_ISP_FRAME_DONE_P2_4 261125#define CMDQ_EVENT_ISP_FRAME_DONE_P2_5 262126#define CMDQ_EVENT_ISP_FRAME_DONE_P2_6 263127#define CMDQ_EVENT_ISP_FRAME_DONE_P2_7 264128#define CMDQ_EVENT_ISP_FRAME_DONE_P2_8 265129#define CMDQ_EVENT_ISP_FRAME_DONE_P2_9 266130#define CMDQ_EVENT_ISP_FRAME_DONE_P2_10 267131#define CMDQ_EVENT_ISP_FRAME_DONE_P2_11 268132#define CMDQ_EVENT_ISP_FRAME_DONE_P2_12 269133#define CMDQ_EVENT_ISP_FRAME_DONE_P2_13 270134#define CMDQ_EVENT_ISP_FRAME_DONE_P2_14 271135#define CMDQ_EVENT_ISP_FRAME_DONE_P2_15 272136#define CMDQ_EVENT_ISP_FRAME_DONE_P2_16 273137#define CMDQ_EVENT_ISP_FRAME_DONE_P2_17 274138#define CMDQ_EVENT_ISP_FRAME_DONE_P2_18 275139#define CMDQ_EVENT_AMD_FRAME_DONE 276140#define CMDQ_EVENT_DVE_DONE 277141#define CMDQ_EVENT_WMFE_DONE 278142#define CMDQ_EVENT_RSC_DONE 279143#define CMDQ_EVENT_MFB_DONE 280144#define CMDQ_EVENT_WPE_A_DONE 281145#define CMDQ_EVENT_SPE_B_DONE 282146#define CMDQ_EVENT_OCC_DONE 283147#define CMDQ_EVENT_VENC_CMDQ_FRAME_DONE 289148#define CMDQ_EVENT_JPG_ENC_CMDQ_DONE 290149#define CMDQ_EVENT_JPG_DEC_CMDQ_DONE 291150#define CMDQ_EVENT_VENC_CMDQ_MB_DONE 292151#define CMDQ_EVENT_VENC_CMDQ_128BYTE_DONE 293152#define CMDQ_EVENT_ISP_FRAME_DONE_A 321153#define CMDQ_EVENT_ISP_FRAME_DONE_B 322154#define CMDQ_EVENT_CAMSV0_PASS1_DONE 323155#define CMDQ_EVENT_CAMSV1_PASS1_DONE 324156#define CMDQ_EVENT_CAMSV2_PASS1_DONE 325157#define CMDQ_EVENT_TSF_DONE 326158#define CMDQ_EVENT_SENINF_CAM0_FIFO_FULL 327159#define CMDQ_EVENT_SENINF_CAM1_FIFO_FULL 328160#define CMDQ_EVENT_SENINF_CAM2_FIFO_FULL 329161#define CMDQ_EVENT_SENINF_CAM3_FIFO_FULL 330162#define CMDQ_EVENT_SENINF_CAM4_FIFO_FULL 331163#define CMDQ_EVENT_SENINF_CAM5_FIFO_FULL 332164#define CMDQ_EVENT_SENINF_CAM6_FIFO_FULL 333165#define CMDQ_EVENT_SENINF_CAM7_FIFO_FULL 334166#define CMDQ_EVENT_IPU_CORE0_DONE0 353167#define CMDQ_EVENT_IPU_CORE0_DONE1 354168#define CMDQ_EVENT_IPU_CORE0_DONE2 355169#define CMDQ_EVENT_IPU_CORE0_DONE3 356170#define CMDQ_EVENT_IPU_CORE1_DONE0 385171#define CMDQ_EVENT_IPU_CORE1_DONE1 386172#define CMDQ_EVENT_IPU_CORE1_DONE2 387173#define CMDQ_EVENT_IPU_CORE1_DONE3 388174 175#endif176