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1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Qualcomm SDX55 interconnect IDs4 *5 * Copyright (c) 2021, Linaro Ltd.6 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>7 */8 9#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H10#define __DT_BINDINGS_INTERCONNECT_QCOM_SDX55_H11 12#define MASTER_LLCC 013#define SLAVE_EBI_CH0 114 15#define MASTER_TCU_0 016#define MASTER_SNOC_GC_MEM_NOC 117#define MASTER_AMPSS_M0 218#define SLAVE_LLCC 319#define SLAVE_MEM_NOC_SNOC 420#define SLAVE_MEM_NOC_PCIE_SNOC 521 22#define MASTER_AUDIO 023#define MASTER_BLSP_1 124#define MASTER_QDSS_BAM 225#define MASTER_QPIC 326#define MASTER_SNOC_CFG 427#define MASTER_SPMI_FETCHER 528#define MASTER_ANOC_SNOC 629#define MASTER_IPA 730#define MASTER_MEM_NOC_SNOC 831#define MASTER_MEM_NOC_PCIE_SNOC 932#define MASTER_CRYPTO_CORE_0 1033#define MASTER_EMAC 1134#define MASTER_IPA_PCIE 1235#define MASTER_PCIE 1336#define MASTER_QDSS_ETR 1437#define MASTER_SDCC_1 1538#define MASTER_USB3 1639#define SLAVE_AOP 1740#define SLAVE_AOSS 1841#define SLAVE_APPSS 1942#define SLAVE_AUDIO 2043#define SLAVE_BLSP_1 2144#define SLAVE_CLK_CTL 2245#define SLAVE_CRYPTO_0_CFG 2346#define SLAVE_CNOC_DDRSS 2447#define SLAVE_ECC_CFG 2548#define SLAVE_EMAC_CFG 2649#define SLAVE_IMEM_CFG 2750#define SLAVE_IPA_CFG 2851#define SLAVE_CNOC_MSS 2952#define SLAVE_PCIE_PARF 3053#define SLAVE_PDM 3154#define SLAVE_PRNG 3255#define SLAVE_QDSS_CFG 3356#define SLAVE_QPIC 3457#define SLAVE_SDCC_1 3558#define SLAVE_SNOC_CFG 3659#define SLAVE_SPMI_FETCHER 3760#define SLAVE_SPMI_VGI_COEX 3861#define SLAVE_TCSR 3962#define SLAVE_TLMM 4063#define SLAVE_USB3 4164#define SLAVE_USB3_PHY_CFG 4265#define SLAVE_ANOC_SNOC 4366#define SLAVE_SNOC_MEM_NOC_GC 4467#define SLAVE_OCIMEM 4568#define SLAVE_SERVICE_SNOC 4669#define SLAVE_PCIE_0 4770#define SLAVE_QDSS_STM 4871#define SLAVE_TCU 4972 73 74#endif75