44 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef DT_BINDINGS_MEMORY_TEGRA114_MC_H3#define DT_BINDINGS_MEMORY_TEGRA114_MC_H4 5#define TEGRA_SWGROUP_PTC 06#define TEGRA_SWGROUP_DC 17#define TEGRA_SWGROUP_DCB 28#define TEGRA_SWGROUP_EPP 39#define TEGRA_SWGROUP_G2 410#define TEGRA_SWGROUP_AVPC 511#define TEGRA_SWGROUP_NV 612#define TEGRA_SWGROUP_HDA 713#define TEGRA_SWGROUP_HC 814#define TEGRA_SWGROUP_MSENC 915#define TEGRA_SWGROUP_PPCS 1016#define TEGRA_SWGROUP_VDE 1117#define TEGRA_SWGROUP_MPCORELP 1218#define TEGRA_SWGROUP_MPCORE 1319#define TEGRA_SWGROUP_VI 1420#define TEGRA_SWGROUP_ISP 1521#define TEGRA_SWGROUP_XUSB_HOST 1622#define TEGRA_SWGROUP_XUSB_DEV 1723#define TEGRA_SWGROUP_EMUCIF 1824#define TEGRA_SWGROUP_TSEC 1925 26#define TEGRA114_MC_RESET_AVPC 027#define TEGRA114_MC_RESET_DC 128#define TEGRA114_MC_RESET_DCB 229#define TEGRA114_MC_RESET_EPP 330#define TEGRA114_MC_RESET_2D 431#define TEGRA114_MC_RESET_HC 532#define TEGRA114_MC_RESET_HDA 633#define TEGRA114_MC_RESET_ISP 734#define TEGRA114_MC_RESET_MPCORE 835#define TEGRA114_MC_RESET_MPCORELP 936#define TEGRA114_MC_RESET_MPE 1037#define TEGRA114_MC_RESET_3D 1138#define TEGRA114_MC_RESET_3D2 1239#define TEGRA114_MC_RESET_PPCS 1340#define TEGRA114_MC_RESET_VDE 1441#define TEGRA114_MC_RESET_VI 1542 43#endif44