126 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2#ifndef DT_BINDINGS_MEMORY_TEGRA124_MC_H3#define DT_BINDINGS_MEMORY_TEGRA124_MC_H4 5#define TEGRA_SWGROUP_PTC 06#define TEGRA_SWGROUP_DC 17#define TEGRA_SWGROUP_DCB 28#define TEGRA_SWGROUP_AFI 39#define TEGRA_SWGROUP_AVPC 410#define TEGRA_SWGROUP_HDA 511#define TEGRA_SWGROUP_HC 612#define TEGRA_SWGROUP_MSENC 713#define TEGRA_SWGROUP_PPCS 814#define TEGRA_SWGROUP_SATA 915#define TEGRA_SWGROUP_VDE 1016#define TEGRA_SWGROUP_MPCORELP 1117#define TEGRA_SWGROUP_MPCORE 1218#define TEGRA_SWGROUP_ISP2 1319#define TEGRA_SWGROUP_XUSB_HOST 1420#define TEGRA_SWGROUP_XUSB_DEV 1521#define TEGRA_SWGROUP_ISP2B 1622#define TEGRA_SWGROUP_TSEC 1723#define TEGRA_SWGROUP_A9AVP 1824#define TEGRA_SWGROUP_GPU 1925#define TEGRA_SWGROUP_SDMMC1A 2026#define TEGRA_SWGROUP_SDMMC2A 2127#define TEGRA_SWGROUP_SDMMC3A 2228#define TEGRA_SWGROUP_SDMMC4A 2329#define TEGRA_SWGROUP_VIC 2430#define TEGRA_SWGROUP_VI 2531 32#define TEGRA124_MC_RESET_AFI 033#define TEGRA124_MC_RESET_AVPC 134#define TEGRA124_MC_RESET_DC 235#define TEGRA124_MC_RESET_DCB 336#define TEGRA124_MC_RESET_HC 437#define TEGRA124_MC_RESET_HDA 538#define TEGRA124_MC_RESET_ISP2 639#define TEGRA124_MC_RESET_MPCORE 740#define TEGRA124_MC_RESET_MPCORELP 841#define TEGRA124_MC_RESET_MSENC 942#define TEGRA124_MC_RESET_PPCS 1043#define TEGRA124_MC_RESET_SATA 1144#define TEGRA124_MC_RESET_VDE 1245#define TEGRA124_MC_RESET_VI 1346#define TEGRA124_MC_RESET_VIC 1447#define TEGRA124_MC_RESET_XUSB_HOST 1548#define TEGRA124_MC_RESET_XUSB_DEV 1649#define TEGRA124_MC_RESET_TSEC 1750#define TEGRA124_MC_RESET_SDMMC1 1851#define TEGRA124_MC_RESET_SDMMC2 1952#define TEGRA124_MC_RESET_SDMMC3 2053#define TEGRA124_MC_RESET_SDMMC4 2154#define TEGRA124_MC_RESET_ISP2B 2255#define TEGRA124_MC_RESET_GPU 2356 57#define TEGRA124_MC_PTCR 058#define TEGRA124_MC_DISPLAY0A 159#define TEGRA124_MC_DISPLAY0AB 260#define TEGRA124_MC_DISPLAY0B 361#define TEGRA124_MC_DISPLAY0BB 462#define TEGRA124_MC_DISPLAY0C 563#define TEGRA124_MC_DISPLAY0CB 664#define TEGRA124_MC_AFIR 1465#define TEGRA124_MC_AVPCARM7R 1566#define TEGRA124_MC_DISPLAYHC 1667#define TEGRA124_MC_DISPLAYHCB 1768#define TEGRA124_MC_HDAR 2169#define TEGRA124_MC_HOST1XDMAR 2270#define TEGRA124_MC_HOST1XR 2371#define TEGRA124_MC_MSENCSRD 2872#define TEGRA124_MC_PPCSAHBDMAR 2973#define TEGRA124_MC_PPCSAHBSLVR 3074#define TEGRA124_MC_SATAR 3175#define TEGRA124_MC_VDEBSEVR 3476#define TEGRA124_MC_VDEMBER 3577#define TEGRA124_MC_VDEMCER 3678#define TEGRA124_MC_VDETPER 3779#define TEGRA124_MC_MPCORELPR 3880#define TEGRA124_MC_MPCORER 3981#define TEGRA124_MC_MSENCSWR 4382#define TEGRA124_MC_AFIW 4983#define TEGRA124_MC_AVPCARM7W 5084#define TEGRA124_MC_HDAW 5385#define TEGRA124_MC_HOST1XW 5486#define TEGRA124_MC_MPCORELPW 5687#define TEGRA124_MC_MPCOREW 5788#define TEGRA124_MC_PPCSAHBDMAW 5989#define TEGRA124_MC_PPCSAHBSLVW 6090#define TEGRA124_MC_SATAW 6191#define TEGRA124_MC_VDEBSEVW 6292#define TEGRA124_MC_VDEDBGW 6393#define TEGRA124_MC_VDEMBEW 6494#define TEGRA124_MC_VDETPMW 6595#define TEGRA124_MC_ISPRA 6896#define TEGRA124_MC_ISPWA 7097#define TEGRA124_MC_ISPWB 7198#define TEGRA124_MC_XUSB_HOSTR 7499#define TEGRA124_MC_XUSB_HOSTW 75100#define TEGRA124_MC_XUSB_DEVR 76101#define TEGRA124_MC_XUSB_DEVW 77102#define TEGRA124_MC_ISPRAB 78103#define TEGRA124_MC_ISPWAB 80104#define TEGRA124_MC_ISPWBB 81105#define TEGRA124_MC_TSECSRD 84106#define TEGRA124_MC_TSECSWR 85107#define TEGRA124_MC_A9AVPSCR 86108#define TEGRA124_MC_A9AVPSCW 87109#define TEGRA124_MC_GPUSRD 88110#define TEGRA124_MC_GPUSWR 89111#define TEGRA124_MC_DISPLAYT 90112#define TEGRA124_MC_SDMMCRA 96113#define TEGRA124_MC_SDMMCRAA 97114#define TEGRA124_MC_SDMMCR 98115#define TEGRA124_MC_SDMMCRAB 99116#define TEGRA124_MC_SDMMCWA 100117#define TEGRA124_MC_SDMMCWAA 101118#define TEGRA124_MC_SDMMCW 102119#define TEGRA124_MC_SDMMCWAB 103120#define TEGRA124_MC_VICSRD 108121#define TEGRA124_MC_VICSWR 109122#define TEGRA124_MC_VIW 114123#define TEGRA124_MC_DISPLAYD 115124 125#endif126