251 lines · c
1#ifndef DT_BINDINGS_MEMORY_TEGRA186_MC_H2#define DT_BINDINGS_MEMORY_TEGRA186_MC_H3 4/* special clients */5#define TEGRA186_SID_INVALID 0x006#define TEGRA186_SID_PASSTHROUGH 0x7f7 8/* host1x clients */9#define TEGRA186_SID_HOST1X 0x0110#define TEGRA186_SID_CSI 0x0211#define TEGRA186_SID_VIC 0x0312#define TEGRA186_SID_VI 0x0413#define TEGRA186_SID_ISP 0x0514#define TEGRA186_SID_NVDEC 0x0615#define TEGRA186_SID_NVENC 0x0716#define TEGRA186_SID_NVJPG 0x0817#define TEGRA186_SID_NVDISPLAY 0x0918#define TEGRA186_SID_TSEC 0x0a19#define TEGRA186_SID_TSECB 0x0b20#define TEGRA186_SID_SE 0x0c21#define TEGRA186_SID_SE1 0x0d22#define TEGRA186_SID_SE2 0x0e23#define TEGRA186_SID_SE3 0x0f24 25/* GPU clients */26#define TEGRA186_SID_GPU 0x1027 28/* other SoC clients */29#define TEGRA186_SID_AFI 0x1130#define TEGRA186_SID_HDA 0x1231#define TEGRA186_SID_ETR 0x1332#define TEGRA186_SID_EQOS 0x1433#define TEGRA186_SID_UFSHC 0x1534#define TEGRA186_SID_AON 0x1635#define TEGRA186_SID_SDMMC4 0x1736#define TEGRA186_SID_SDMMC3 0x1837#define TEGRA186_SID_SDMMC2 0x1938#define TEGRA186_SID_SDMMC1 0x1a39#define TEGRA186_SID_XUSB_HOST 0x1b40#define TEGRA186_SID_XUSB_DEV 0x1c41#define TEGRA186_SID_SATA 0x1d42#define TEGRA186_SID_APE 0x1e43#define TEGRA186_SID_SCE 0x1f44 45/* GPC DMA clients */46#define TEGRA186_SID_GPCDMA_0 0x2047#define TEGRA186_SID_GPCDMA_1 0x2148#define TEGRA186_SID_GPCDMA_2 0x2249#define TEGRA186_SID_GPCDMA_3 0x2350#define TEGRA186_SID_GPCDMA_4 0x2451#define TEGRA186_SID_GPCDMA_5 0x2552#define TEGRA186_SID_GPCDMA_6 0x2653#define TEGRA186_SID_GPCDMA_7 0x2754 55/* APE DMA clients */56#define TEGRA186_SID_APE_1 0x2857#define TEGRA186_SID_APE_2 0x2958 59/* camera RTCPU */60#define TEGRA186_SID_RCE 0x2a61 62/* camera RTCPU on host1x address space */63#define TEGRA186_SID_RCE_1X 0x2b64 65/* APE DMA clients */66#define TEGRA186_SID_APE_3 0x2c67 68/* camera RTCPU running on APE */69#define TEGRA186_SID_APE_CAM 0x2d70#define TEGRA186_SID_APE_CAM_1X 0x2e71 72/*73 * The BPMP has its SID value hardcoded in the firmware. Changing it requires74 * considerable effort.75 */76#define TEGRA186_SID_BPMP 0x3277 78/* for SMMU tests */79#define TEGRA186_SID_SMMU_TEST 0x3380 81/* host1x virtualization channels */82#define TEGRA186_SID_HOST1X_CTX0 0x3883#define TEGRA186_SID_HOST1X_CTX1 0x3984#define TEGRA186_SID_HOST1X_CTX2 0x3a85#define TEGRA186_SID_HOST1X_CTX3 0x3b86#define TEGRA186_SID_HOST1X_CTX4 0x3c87#define TEGRA186_SID_HOST1X_CTX5 0x3d88#define TEGRA186_SID_HOST1X_CTX6 0x3e89#define TEGRA186_SID_HOST1X_CTX7 0x3f90 91/* host1x command buffers */92#define TEGRA186_SID_HOST1X_VM0 0x4093#define TEGRA186_SID_HOST1X_VM1 0x4194#define TEGRA186_SID_HOST1X_VM2 0x4295#define TEGRA186_SID_HOST1X_VM3 0x4396#define TEGRA186_SID_HOST1X_VM4 0x4497#define TEGRA186_SID_HOST1X_VM5 0x4598#define TEGRA186_SID_HOST1X_VM6 0x4699#define TEGRA186_SID_HOST1X_VM7 0x47100 101/* SE data buffers */102#define TEGRA186_SID_SE_VM0 0x48103#define TEGRA186_SID_SE_VM1 0x49104#define TEGRA186_SID_SE_VM2 0x4a105#define TEGRA186_SID_SE_VM3 0x4b106#define TEGRA186_SID_SE_VM4 0x4c107#define TEGRA186_SID_SE_VM5 0x4d108#define TEGRA186_SID_SE_VM6 0x4e109#define TEGRA186_SID_SE_VM7 0x4f110 111/*112 * memory client IDs113 */114 115/* Misses from System Memory Management Unit (SMMU) Page Table Cache (PTC) */116#define TEGRA186_MEMORY_CLIENT_PTCR 0x00117/* PCIE reads */118#define TEGRA186_MEMORY_CLIENT_AFIR 0x0e119/* High-definition audio (HDA) reads */120#define TEGRA186_MEMORY_CLIENT_HDAR 0x15121/* Host channel data reads */122#define TEGRA186_MEMORY_CLIENT_HOST1XDMAR 0x16123#define TEGRA186_MEMORY_CLIENT_NVENCSRD 0x1c124/* SATA reads */125#define TEGRA186_MEMORY_CLIENT_SATAR 0x1f126/* Reads from Cortex-A9 4 CPU cores via the L2 cache */127#define TEGRA186_MEMORY_CLIENT_MPCORER 0x27128#define TEGRA186_MEMORY_CLIENT_NVENCSWR 0x2b129/* PCIE writes */130#define TEGRA186_MEMORY_CLIENT_AFIW 0x31131/* High-definition audio (HDA) writes */132#define TEGRA186_MEMORY_CLIENT_HDAW 0x35133/* Writes from Cortex-A9 4 CPU cores via the L2 cache */134#define TEGRA186_MEMORY_CLIENT_MPCOREW 0x39135/* SATA writes */136#define TEGRA186_MEMORY_CLIENT_SATAW 0x3d137/* ISP Read client for Crossbar A */138#define TEGRA186_MEMORY_CLIENT_ISPRA 0x44139/* ISP Write client for Crossbar A */140#define TEGRA186_MEMORY_CLIENT_ISPWA 0x46141/* ISP Write client Crossbar B */142#define TEGRA186_MEMORY_CLIENT_ISPWB 0x47143/* XUSB reads */144#define TEGRA186_MEMORY_CLIENT_XUSB_HOSTR 0x4a145/* XUSB_HOST writes */146#define TEGRA186_MEMORY_CLIENT_XUSB_HOSTW 0x4b147/* XUSB reads */148#define TEGRA186_MEMORY_CLIENT_XUSB_DEVR 0x4c149/* XUSB_DEV writes */150#define TEGRA186_MEMORY_CLIENT_XUSB_DEVW 0x4d151/* TSEC Memory Return Data Client Description */152#define TEGRA186_MEMORY_CLIENT_TSECSRD 0x54153/* TSEC Memory Write Client Description */154#define TEGRA186_MEMORY_CLIENT_TSECSWR 0x55155/* 3D, ltcx reads instance 0 */156#define TEGRA186_MEMORY_CLIENT_GPUSRD 0x58157/* 3D, ltcx writes instance 0 */158#define TEGRA186_MEMORY_CLIENT_GPUSWR 0x59159/* sdmmca memory read client */160#define TEGRA186_MEMORY_CLIENT_SDMMCRA 0x60161/* sdmmcbmemory read client */162#define TEGRA186_MEMORY_CLIENT_SDMMCRAA 0x61163/* sdmmc memory read client */164#define TEGRA186_MEMORY_CLIENT_SDMMCR 0x62165/* sdmmcd memory read client */166#define TEGRA186_MEMORY_CLIENT_SDMMCRAB 0x63167/* sdmmca memory write client */168#define TEGRA186_MEMORY_CLIENT_SDMMCWA 0x64169/* sdmmcb memory write client */170#define TEGRA186_MEMORY_CLIENT_SDMMCWAA 0x65171/* sdmmc memory write client */172#define TEGRA186_MEMORY_CLIENT_SDMMCW 0x66173/* sdmmcd memory write client */174#define TEGRA186_MEMORY_CLIENT_SDMMCWAB 0x67175#define TEGRA186_MEMORY_CLIENT_VICSRD 0x6c176#define TEGRA186_MEMORY_CLIENT_VICSWR 0x6d177/* VI Write client */178#define TEGRA186_MEMORY_CLIENT_VIW 0x72179#define TEGRA186_MEMORY_CLIENT_NVDECSRD 0x78180#define TEGRA186_MEMORY_CLIENT_NVDECSWR 0x79181/* Audio Processing (APE) engine reads */182#define TEGRA186_MEMORY_CLIENT_APER 0x7a183/* Audio Processing (APE) engine writes */184#define TEGRA186_MEMORY_CLIENT_APEW 0x7b185#define TEGRA186_MEMORY_CLIENT_NVJPGSRD 0x7e186#define TEGRA186_MEMORY_CLIENT_NVJPGSWR 0x7f187/* SE Memory Return Data Client Description */188#define TEGRA186_MEMORY_CLIENT_SESRD 0x80189/* SE Memory Write Client Description */190#define TEGRA186_MEMORY_CLIENT_SESWR 0x81191/* ETR reads */192#define TEGRA186_MEMORY_CLIENT_ETRR 0x84193/* ETR writes */194#define TEGRA186_MEMORY_CLIENT_ETRW 0x85195/* TSECB Memory Return Data Client Description */196#define TEGRA186_MEMORY_CLIENT_TSECSRDB 0x86197/* TSECB Memory Write Client Description */198#define TEGRA186_MEMORY_CLIENT_TSECSWRB 0x87199/* 3D, ltcx reads instance 1 */200#define TEGRA186_MEMORY_CLIENT_GPUSRD2 0x88201/* 3D, ltcx writes instance 1 */202#define TEGRA186_MEMORY_CLIENT_GPUSWR2 0x89203/* AXI Switch read client */204#define TEGRA186_MEMORY_CLIENT_AXISR 0x8c205/* AXI Switch write client */206#define TEGRA186_MEMORY_CLIENT_AXISW 0x8d207/* EQOS read client */208#define TEGRA186_MEMORY_CLIENT_EQOSR 0x8e209/* EQOS write client */210#define TEGRA186_MEMORY_CLIENT_EQOSW 0x8f211/* UFSHC read client */212#define TEGRA186_MEMORY_CLIENT_UFSHCR 0x90213/* UFSHC write client */214#define TEGRA186_MEMORY_CLIENT_UFSHCW 0x91215/* NVDISPLAY read client */216#define TEGRA186_MEMORY_CLIENT_NVDISPLAYR 0x92217/* BPMP read client */218#define TEGRA186_MEMORY_CLIENT_BPMPR 0x93219/* BPMP write client */220#define TEGRA186_MEMORY_CLIENT_BPMPW 0x94221/* BPMPDMA read client */222#define TEGRA186_MEMORY_CLIENT_BPMPDMAR 0x95223/* BPMPDMA write client */224#define TEGRA186_MEMORY_CLIENT_BPMPDMAW 0x96225/* AON read client */226#define TEGRA186_MEMORY_CLIENT_AONR 0x97227/* AON write client */228#define TEGRA186_MEMORY_CLIENT_AONW 0x98229/* AONDMA read client */230#define TEGRA186_MEMORY_CLIENT_AONDMAR 0x99231/* AONDMA write client */232#define TEGRA186_MEMORY_CLIENT_AONDMAW 0x9a233/* SCE read client */234#define TEGRA186_MEMORY_CLIENT_SCER 0x9b235/* SCE write client */236#define TEGRA186_MEMORY_CLIENT_SCEW 0x9c237/* SCEDMA read client */238#define TEGRA186_MEMORY_CLIENT_SCEDMAR 0x9d239/* SCEDMA write client */240#define TEGRA186_MEMORY_CLIENT_SCEDMAW 0x9e241/* APEDMA read client */242#define TEGRA186_MEMORY_CLIENT_APEDMAR 0x9f243/* APEDMA write client */244#define TEGRA186_MEMORY_CLIENT_APEDMAW 0xa0245/* NVDISPLAY read client instance 2 */246#define TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 0xa1247#define TEGRA186_MEMORY_CLIENT_VICSRD1 0xa2248#define TEGRA186_MEMORY_CLIENT_NVDECSRD1 0xa3249 250#endif251