54 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * This header provides macros for ams AS3722 device bindings.4 *5 * Copyright (c) 2013, NVIDIA Corporation.6 *7 * Author: Laxman Dewangan <ldewangan@nvidia.com>8 *9 */10 11#ifndef __DT_BINDINGS_AS3722_H__12#define __DT_BINDINGS_AS3722_H__13 14/* External control pins */15#define AS3722_EXT_CONTROL_PIN_ENABLE1 116#define AS3722_EXT_CONTROL_PIN_ENABLE2 217#define AS3722_EXT_CONTROL_PIN_ENABLE3 318 19/* Interrupt numbers for AS3722 */20#define AS3722_IRQ_LID 021#define AS3722_IRQ_ACOK 122#define AS3722_IRQ_ENABLE1 223#define AS3722_IRQ_OCCUR_ALARM_SD0 324#define AS3722_IRQ_ONKEY_LONG_PRESS 425#define AS3722_IRQ_ONKEY 526#define AS3722_IRQ_OVTMP 627#define AS3722_IRQ_LOWBAT 728#define AS3722_IRQ_SD0_LV 829#define AS3722_IRQ_SD1_LV 930#define AS3722_IRQ_SD2_LV 1031#define AS3722_IRQ_PWM1_OV_PROT 1132#define AS3722_IRQ_PWM2_OV_PROT 1233#define AS3722_IRQ_ENABLE2 1334#define AS3722_IRQ_SD6_LV 1435#define AS3722_IRQ_RTC_REP 1536#define AS3722_IRQ_RTC_ALARM 1637#define AS3722_IRQ_GPIO1 1738#define AS3722_IRQ_GPIO2 1839#define AS3722_IRQ_GPIO3 1940#define AS3722_IRQ_GPIO4 2041#define AS3722_IRQ_GPIO5 2142#define AS3722_IRQ_WATCHDOG 2243#define AS3722_IRQ_ENABLE3 2344#define AS3722_IRQ_TEMP_SD0_SHUTDOWN 2445#define AS3722_IRQ_TEMP_SD1_SHUTDOWN 2546#define AS3722_IRQ_TEMP_SD2_SHUTDOWN 2647#define AS3722_IRQ_TEMP_SD0_ALARM 2748#define AS3722_IRQ_TEMP_SD1_ALARM 2849#define AS3722_IRQ_TEMP_SD6_ALARM 2950#define AS3722_IRQ_OCCUR_ALARM_SD6 3051#define AS3722_IRQ_ADC 3152 53#endif /* __DT_BINDINGS_AS3722_H__ */54