173 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * This header provides constants specific to AM33XX pinctrl bindings.4 */5 6#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H7#define _DT_BINDINGS_PINCTRL_AM33XX_H8 9#include <dt-bindings/pinctrl/omap.h>10 11/* am33xx specific mux bit defines */12#undef PULL_ENA13#undef INPUT_EN14 15#define PULL_DISABLE (1 << 3)16#define INPUT_EN (1 << 5)17#define SLEWCTRL_SLOW (1 << 6)18#define SLEWCTRL_FAST 019 20/* update macro depending on INPUT_EN and PULL_ENA */21#undef PIN_OUTPUT22#undef PIN_OUTPUT_PULLUP23#undef PIN_OUTPUT_PULLDOWN24#undef PIN_INPUT25#undef PIN_INPUT_PULLUP26#undef PIN_INPUT_PULLDOWN27 28#define PIN_OUTPUT (PULL_DISABLE)29#define PIN_OUTPUT_PULLUP (PULL_UP)30#define PIN_OUTPUT_PULLDOWN 031#define PIN_INPUT (INPUT_EN | PULL_DISABLE)32#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)33#define PIN_INPUT_PULLDOWN (INPUT_EN)34 35/* undef non-existing modes */36#undef PIN_OFF_NONE37#undef PIN_OFF_OUTPUT_HIGH38#undef PIN_OFF_OUTPUT_LOW39#undef PIN_OFF_INPUT_PULLUP40#undef PIN_OFF_INPUT_PULLDOWN41#undef PIN_OFF_WAKEUPENABLE42 43#define AM335X_PIN_OFFSET_MIN 0x0800U44 45#define AM335X_PIN_GPMC_AD0 0x80046#define AM335X_PIN_GPMC_AD1 0x80447#define AM335X_PIN_GPMC_AD2 0x80848#define AM335X_PIN_GPMC_AD3 0x80c49#define AM335X_PIN_GPMC_AD4 0x81050#define AM335X_PIN_GPMC_AD5 0x81451#define AM335X_PIN_GPMC_AD6 0x81852#define AM335X_PIN_GPMC_AD7 0x81c53#define AM335X_PIN_GPMC_AD8 0x82054#define AM335X_PIN_GPMC_AD9 0x82455#define AM335X_PIN_GPMC_AD10 0x82856#define AM335X_PIN_GPMC_AD11 0x82c57#define AM335X_PIN_GPMC_AD12 0x83058#define AM335X_PIN_GPMC_AD13 0x83459#define AM335X_PIN_GPMC_AD14 0x83860#define AM335X_PIN_GPMC_AD15 0x83c61#define AM335X_PIN_GPMC_A0 0x84062#define AM335X_PIN_GPMC_A1 0x84463#define AM335X_PIN_GPMC_A2 0x84864#define AM335X_PIN_GPMC_A3 0x84c65#define AM335X_PIN_GPMC_A4 0x85066#define AM335X_PIN_GPMC_A5 0x85467#define AM335X_PIN_GPMC_A6 0x85868#define AM335X_PIN_GPMC_A7 0x85c69#define AM335X_PIN_GPMC_A8 0x86070#define AM335X_PIN_GPMC_A9 0x86471#define AM335X_PIN_GPMC_A10 0x86872#define AM335X_PIN_GPMC_A11 0x86c73#define AM335X_PIN_GPMC_WAIT0 0x87074#define AM335X_PIN_GPMC_WPN 0x87475#define AM335X_PIN_GPMC_BEN1 0x87876#define AM335X_PIN_GPMC_CSN0 0x87c77#define AM335X_PIN_GPMC_CSN1 0x88078#define AM335X_PIN_GPMC_CSN2 0x88479#define AM335X_PIN_GPMC_CSN3 0x88880#define AM335X_PIN_GPMC_CLK 0x88c81#define AM335X_PIN_GPMC_ADVN_ALE 0x89082#define AM335X_PIN_GPMC_OEN_REN 0x89483#define AM335X_PIN_GPMC_WEN 0x89884#define AM335X_PIN_GPMC_BEN0_CLE 0x89c85#define AM335X_PIN_LCD_DATA0 0x8a086#define AM335X_PIN_LCD_DATA1 0x8a487#define AM335X_PIN_LCD_DATA2 0x8a888#define AM335X_PIN_LCD_DATA3 0x8ac89#define AM335X_PIN_LCD_DATA4 0x8b090#define AM335X_PIN_LCD_DATA5 0x8b491#define AM335X_PIN_LCD_DATA6 0x8b892#define AM335X_PIN_LCD_DATA7 0x8bc93#define AM335X_PIN_LCD_DATA8 0x8c094#define AM335X_PIN_LCD_DATA9 0x8c495#define AM335X_PIN_LCD_DATA10 0x8c896#define AM335X_PIN_LCD_DATA11 0x8cc97#define AM335X_PIN_LCD_DATA12 0x8d098#define AM335X_PIN_LCD_DATA13 0x8d499#define AM335X_PIN_LCD_DATA14 0x8d8100#define AM335X_PIN_LCD_DATA15 0x8dc101#define AM335X_PIN_LCD_VSYNC 0x8e0102#define AM335X_PIN_LCD_HSYNC 0x8e4103#define AM335X_PIN_LCD_PCLK 0x8e8104#define AM335X_PIN_LCD_AC_BIAS_EN 0x8ec105#define AM335X_PIN_MMC0_DAT3 0x8f0106#define AM335X_PIN_MMC0_DAT2 0x8f4107#define AM335X_PIN_MMC0_DAT1 0x8f8108#define AM335X_PIN_MMC0_DAT0 0x8fc109#define AM335X_PIN_MMC0_CLK 0x900110#define AM335X_PIN_MMC0_CMD 0x904111#define AM335X_PIN_MII1_COL 0x908112#define AM335X_PIN_MII1_CRS 0x90c113#define AM335X_PIN_MII1_RX_ER 0x910114#define AM335X_PIN_MII1_TX_EN 0x914115#define AM335X_PIN_MII1_RX_DV 0x918116#define AM335X_PIN_MII1_TXD3 0x91c117#define AM335X_PIN_MII1_TXD2 0x920118#define AM335X_PIN_MII1_TXD1 0x924119#define AM335X_PIN_MII1_TXD0 0x928120#define AM335X_PIN_MII1_TX_CLK 0x92c121#define AM335X_PIN_MII1_RX_CLK 0x930122#define AM335X_PIN_MII1_RXD3 0x934123#define AM335X_PIN_MII1_RXD2 0x938124#define AM335X_PIN_MII1_RXD1 0x93c125#define AM335X_PIN_MII1_RXD0 0x940126#define AM335X_PIN_RMII1_REF_CLK 0x944127#define AM335X_PIN_MDIO 0x948128#define AM335X_PIN_MDC 0x94c129#define AM335X_PIN_SPI0_SCLK 0x950130#define AM335X_PIN_SPI0_D0 0x954131#define AM335X_PIN_SPI0_D1 0x958132#define AM335X_PIN_SPI0_CS0 0x95c133#define AM335X_PIN_SPI0_CS1 0x960134#define AM335X_PIN_ECAP0_IN_PWM0_OUT 0x964135#define AM335X_PIN_UART0_CTSN 0x968136#define AM335X_PIN_UART0_RTSN 0x96c137#define AM335X_PIN_UART0_RXD 0x970138#define AM335X_PIN_UART0_TXD 0x974139#define AM335X_PIN_UART1_CTSN 0x978140#define AM335X_PIN_UART1_RTSN 0x97c141#define AM335X_PIN_UART1_RXD 0x980142#define AM335X_PIN_UART1_TXD 0x984143#define AM335X_PIN_I2C0_SDA 0x988144#define AM335X_PIN_I2C0_SCL 0x98c145#define AM335X_PIN_MCASP0_ACLKX 0x990146#define AM335X_PIN_MCASP0_FSX 0x994147#define AM335X_PIN_MCASP0_AXR0 0x998148#define AM335X_PIN_MCASP0_AHCLKR 0x99c149#define AM335X_PIN_MCASP0_ACLKR 0x9a0150#define AM335X_PIN_MCASP0_FSR 0x9a4151#define AM335X_PIN_MCASP0_AXR1 0x9a8152#define AM335X_PIN_MCASP0_AHCLKX 0x9ac153#define AM335X_PIN_XDMA_EVENT_INTR0 0x9b0154#define AM335X_PIN_XDMA_EVENT_INTR1 0x9b4155#define AM335X_PIN_WARMRSTN 0x9b8156#define AM335X_PIN_NNMI 0x9c0157#define AM335X_PIN_TMS 0x9d0158#define AM335X_PIN_TDI 0x9d4159#define AM335X_PIN_TDO 0x9d8160#define AM335X_PIN_TCK 0x9dc161#define AM335X_PIN_TRSTN 0x9e0162#define AM335X_PIN_EMU0 0x9e4163#define AM335X_PIN_EMU1 0x9e8164#define AM335X_PIN_RTC_PWRONRSTN 0x9f8165#define AM335X_PIN_PMIC_POWER_EN 0x9fc166#define AM335X_PIN_EXT_WAKEUP 0xa00167#define AM335X_PIN_USB0_DRVVBUS 0xa1c168#define AM335X_PIN_USB1_DRVVBUS 0xa34169 170#define AM335X_PIN_OFFSET_MAX 0x0a34U171 172#endif173