133 lines · c
1/* SPDX-License-Identifier: GPL-2.0 */2/*3 * Device Tree defines for Lochnagar pinctrl4 *5 * Copyright (c) 2018 Cirrus Logic, Inc. and6 * Cirrus Logic International Semiconductor Ltd.7 *8 * Author: Charles Keepax <ckeepax@opensource.cirrus.com>9 */10 11#ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H12#define DT_BINDINGS_PINCTRL_LOCHNAGAR_H13 14#define LOCHNAGAR1_PIN_CDC_RESET 015#define LOCHNAGAR1_PIN_DSP_RESET 116#define LOCHNAGAR1_PIN_CDC_CIF1MODE 217#define LOCHNAGAR1_PIN_NUM_GPIOS 318 19#define LOCHNAGAR2_PIN_CDC_RESET 020#define LOCHNAGAR2_PIN_DSP_RESET 121#define LOCHNAGAR2_PIN_CDC_CIF1MODE 222#define LOCHNAGAR2_PIN_CDC_LDOENA 323#define LOCHNAGAR2_PIN_SPDIF_HWMODE 424#define LOCHNAGAR2_PIN_SPDIF_RESET 525#define LOCHNAGAR2_PIN_FPGA_GPIO1 626#define LOCHNAGAR2_PIN_FPGA_GPIO2 727#define LOCHNAGAR2_PIN_FPGA_GPIO3 828#define LOCHNAGAR2_PIN_FPGA_GPIO4 929#define LOCHNAGAR2_PIN_FPGA_GPIO5 1030#define LOCHNAGAR2_PIN_FPGA_GPIO6 1131#define LOCHNAGAR2_PIN_CDC_GPIO1 1232#define LOCHNAGAR2_PIN_CDC_GPIO2 1333#define LOCHNAGAR2_PIN_CDC_GPIO3 1434#define LOCHNAGAR2_PIN_CDC_GPIO4 1535#define LOCHNAGAR2_PIN_CDC_GPIO5 1636#define LOCHNAGAR2_PIN_CDC_GPIO6 1737#define LOCHNAGAR2_PIN_CDC_GPIO7 1838#define LOCHNAGAR2_PIN_CDC_GPIO8 1939#define LOCHNAGAR2_PIN_DSP_GPIO1 2040#define LOCHNAGAR2_PIN_DSP_GPIO2 2141#define LOCHNAGAR2_PIN_DSP_GPIO3 2242#define LOCHNAGAR2_PIN_DSP_GPIO4 2343#define LOCHNAGAR2_PIN_DSP_GPIO5 2444#define LOCHNAGAR2_PIN_DSP_GPIO6 2545#define LOCHNAGAR2_PIN_GF_GPIO2 2646#define LOCHNAGAR2_PIN_GF_GPIO3 2747#define LOCHNAGAR2_PIN_GF_GPIO7 2848#define LOCHNAGAR2_PIN_CDC_AIF1_BCLK 2949#define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT 3050#define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK 3151#define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT 3252#define LOCHNAGAR2_PIN_CDC_AIF2_BCLK 3353#define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT 3454#define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK 3555#define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT 3656#define LOCHNAGAR2_PIN_CDC_AIF3_BCLK 3757#define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT 3858#define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK 3959#define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT 4060#define LOCHNAGAR2_PIN_DSP_AIF1_BCLK 4161#define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT 4262#define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK 4363#define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT 4464#define LOCHNAGAR2_PIN_DSP_AIF2_BCLK 4565#define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT 4666#define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK 4767#define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT 4868#define LOCHNAGAR2_PIN_PSIA1_BCLK 4969#define LOCHNAGAR2_PIN_PSIA1_RXDAT 5070#define LOCHNAGAR2_PIN_PSIA1_LRCLK 5171#define LOCHNAGAR2_PIN_PSIA1_TXDAT 5272#define LOCHNAGAR2_PIN_PSIA2_BCLK 5373#define LOCHNAGAR2_PIN_PSIA2_RXDAT 5474#define LOCHNAGAR2_PIN_PSIA2_LRCLK 5575#define LOCHNAGAR2_PIN_PSIA2_TXDAT 5676#define LOCHNAGAR2_PIN_GF_AIF3_BCLK 5777#define LOCHNAGAR2_PIN_GF_AIF3_RXDAT 5878#define LOCHNAGAR2_PIN_GF_AIF3_LRCLK 5979#define LOCHNAGAR2_PIN_GF_AIF3_TXDAT 6080#define LOCHNAGAR2_PIN_GF_AIF4_BCLK 6181#define LOCHNAGAR2_PIN_GF_AIF4_RXDAT 6282#define LOCHNAGAR2_PIN_GF_AIF4_LRCLK 6383#define LOCHNAGAR2_PIN_GF_AIF4_TXDAT 6484#define LOCHNAGAR2_PIN_GF_AIF1_BCLK 6585#define LOCHNAGAR2_PIN_GF_AIF1_RXDAT 6686#define LOCHNAGAR2_PIN_GF_AIF1_LRCLK 6787#define LOCHNAGAR2_PIN_GF_AIF1_TXDAT 6888#define LOCHNAGAR2_PIN_GF_AIF2_BCLK 6989#define LOCHNAGAR2_PIN_GF_AIF2_RXDAT 7090#define LOCHNAGAR2_PIN_GF_AIF2_LRCLK 7191#define LOCHNAGAR2_PIN_GF_AIF2_TXDAT 7292#define LOCHNAGAR2_PIN_DSP_UART1_RX 7393#define LOCHNAGAR2_PIN_DSP_UART1_TX 7494#define LOCHNAGAR2_PIN_DSP_UART2_RX 7595#define LOCHNAGAR2_PIN_DSP_UART2_TX 7696#define LOCHNAGAR2_PIN_GF_UART2_RX 7797#define LOCHNAGAR2_PIN_GF_UART2_TX 7898#define LOCHNAGAR2_PIN_USB_UART_RX 7999#define LOCHNAGAR2_PIN_CDC_PDMCLK1 80100#define LOCHNAGAR2_PIN_CDC_PDMDAT1 81101#define LOCHNAGAR2_PIN_CDC_PDMCLK2 82102#define LOCHNAGAR2_PIN_CDC_PDMDAT2 83103#define LOCHNAGAR2_PIN_CDC_DMICCLK1 84104#define LOCHNAGAR2_PIN_CDC_DMICDAT1 85105#define LOCHNAGAR2_PIN_CDC_DMICCLK2 86106#define LOCHNAGAR2_PIN_CDC_DMICDAT2 87107#define LOCHNAGAR2_PIN_CDC_DMICCLK3 88108#define LOCHNAGAR2_PIN_CDC_DMICDAT3 89109#define LOCHNAGAR2_PIN_CDC_DMICCLK4 90110#define LOCHNAGAR2_PIN_CDC_DMICDAT4 91111#define LOCHNAGAR2_PIN_DSP_DMICCLK1 92112#define LOCHNAGAR2_PIN_DSP_DMICDAT1 93113#define LOCHNAGAR2_PIN_DSP_DMICCLK2 94114#define LOCHNAGAR2_PIN_DSP_DMICDAT2 95115#define LOCHNAGAR2_PIN_I2C2_SCL 96116#define LOCHNAGAR2_PIN_I2C2_SDA 97117#define LOCHNAGAR2_PIN_I2C3_SCL 98118#define LOCHNAGAR2_PIN_I2C3_SDA 99119#define LOCHNAGAR2_PIN_I2C4_SCL 100120#define LOCHNAGAR2_PIN_I2C4_SDA 101121#define LOCHNAGAR2_PIN_DSP_STANDBY 102122#define LOCHNAGAR2_PIN_CDC_MCLK1 103123#define LOCHNAGAR2_PIN_CDC_MCLK2 104124#define LOCHNAGAR2_PIN_DSP_CLKIN 105125#define LOCHNAGAR2_PIN_PSIA1_MCLK 106126#define LOCHNAGAR2_PIN_PSIA2_MCLK 107127#define LOCHNAGAR2_PIN_GF_GPIO1 108128#define LOCHNAGAR2_PIN_GF_GPIO5 109129#define LOCHNAGAR2_PIN_DSP_GPIO20 110130#define LOCHNAGAR2_PIN_NUM_GPIOS 111131 132#endif133