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1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */2/*3 * Sunplus SP7021 dt-bindings Pinctrl header file4 * Copyright (C) Sunplus Tech/Tibbo Tech.5 * Author: Dvorkin Dmitry <dvorkin@tibbo.com>6 */7 8#ifndef __DT_BINDINGS_PINCTRL_SPPCTL_SP7021_H__9#define __DT_BINDINGS_PINCTRL_SPPCTL_SP7021_H__10 11#include <dt-bindings/pinctrl/sppctl.h>12 13/*14 * Please don't change the order of the following defines.15 * They are based on order of 'hardware' control register16 * defined in MOON2 ~ MOON3 registers.17 */18#define MUXF_GPIO 019#define MUXF_IOP 120#define MUXF_L2SW_CLK_OUT 221#define MUXF_L2SW_MAC_SMI_MDC 322#define MUXF_L2SW_LED_FLASH0 423#define MUXF_L2SW_LED_FLASH1 524#define MUXF_L2SW_LED_ON0 625#define MUXF_L2SW_LED_ON1 726#define MUXF_L2SW_MAC_SMI_MDIO 827#define MUXF_L2SW_P0_MAC_RMII_TXEN 928#define MUXF_L2SW_P0_MAC_RMII_TXD0 1029#define MUXF_L2SW_P0_MAC_RMII_TXD1 1130#define MUXF_L2SW_P0_MAC_RMII_CRSDV 1231#define MUXF_L2SW_P0_MAC_RMII_RXD0 1332#define MUXF_L2SW_P0_MAC_RMII_RXD1 1433#define MUXF_L2SW_P0_MAC_RMII_RXER 1534#define MUXF_L2SW_P1_MAC_RMII_TXEN 1635#define MUXF_L2SW_P1_MAC_RMII_TXD0 1736#define MUXF_L2SW_P1_MAC_RMII_TXD1 1837#define MUXF_L2SW_P1_MAC_RMII_CRSDV 1938#define MUXF_L2SW_P1_MAC_RMII_RXD0 2039#define MUXF_L2SW_P1_MAC_RMII_RXD1 2140#define MUXF_L2SW_P1_MAC_RMII_RXER 2241#define MUXF_DAISY_MODE 2342#define MUXF_SDIO_CLK 2443#define MUXF_SDIO_CMD 2544#define MUXF_SDIO_D0 2645#define MUXF_SDIO_D1 2746#define MUXF_SDIO_D2 2847#define MUXF_SDIO_D3 2948#define MUXF_PWM0 3049#define MUXF_PWM1 3150#define MUXF_PWM2 3251#define MUXF_PWM3 3352#define MUXF_PWM4 3453#define MUXF_PWM5 3554#define MUXF_PWM6 3655#define MUXF_PWM7 3756#define MUXF_ICM0_D 3857#define MUXF_ICM1_D 3958#define MUXF_ICM2_D 4059#define MUXF_ICM3_D 4160#define MUXF_ICM0_CLK 4261#define MUXF_ICM1_CLK 4362#define MUXF_ICM2_CLK 4463#define MUXF_ICM3_CLK 4564#define MUXF_SPIM0_INT 4665#define MUXF_SPIM0_CLK 4766#define MUXF_SPIM0_EN 4867#define MUXF_SPIM0_DO 4968#define MUXF_SPIM0_DI 5069#define MUXF_SPIM1_INT 5170#define MUXF_SPIM1_CLK 5271#define MUXF_SPIM1_EN 5372#define MUXF_SPIM1_DO 5473#define MUXF_SPIM1_DI 5574#define MUXF_SPIM2_INT 5675#define MUXF_SPIM2_CLK 5776#define MUXF_SPIM2_EN 5877#define MUXF_SPIM2_DO 5978#define MUXF_SPIM2_DI 6079#define MUXF_SPIM3_INT 6180#define MUXF_SPIM3_CLK 6281#define MUXF_SPIM3_EN 6382#define MUXF_SPIM3_DO 6483#define MUXF_SPIM3_DI 6584#define MUXF_SPI0S_INT 6685#define MUXF_SPI0S_CLK 6786#define MUXF_SPI0S_EN 6887#define MUXF_SPI0S_DO 6988#define MUXF_SPI0S_DI 7089#define MUXF_SPI1S_INT 7190#define MUXF_SPI1S_CLK 7291#define MUXF_SPI1S_EN 7392#define MUXF_SPI1S_DO 7493#define MUXF_SPI1S_DI 7594#define MUXF_SPI2S_INT 7695#define MUXF_SPI2S_CLK 7796#define MUXF_SPI2S_EN 7897#define MUXF_SPI2S_DO 7998#define MUXF_SPI2S_DI 8099#define MUXF_SPI3S_INT 81100#define MUXF_SPI3S_CLK 82101#define MUXF_SPI3S_EN 83102#define MUXF_SPI3S_DO 84103#define MUXF_SPI3S_DI 85104#define MUXF_I2CM0_CLK 86105#define MUXF_I2CM0_DAT 87106#define MUXF_I2CM1_CLK 88107#define MUXF_I2CM1_DAT 89108#define MUXF_I2CM2_CLK 90109#define MUXF_I2CM2_DAT 91110#define MUXF_I2CM3_CLK 92111#define MUXF_I2CM3_DAT 93112#define MUXF_UA1_TX 94113#define MUXF_UA1_RX 95114#define MUXF_UA1_CTS 96115#define MUXF_UA1_RTS 97116#define MUXF_UA2_TX 98117#define MUXF_UA2_RX 99118#define MUXF_UA2_CTS 100119#define MUXF_UA2_RTS 101120#define MUXF_UA3_TX 102121#define MUXF_UA3_RX 103122#define MUXF_UA3_CTS 104123#define MUXF_UA3_RTS 105124#define MUXF_UA4_TX 106125#define MUXF_UA4_RX 107126#define MUXF_UA4_CTS 108127#define MUXF_UA4_RTS 109128#define MUXF_TIMER0_INT 110129#define MUXF_TIMER1_INT 111130#define MUXF_TIMER2_INT 112131#define MUXF_TIMER3_INT 113132#define MUXF_GPIO_INT0 114133#define MUXF_GPIO_INT1 115134#define MUXF_GPIO_INT2 116135#define MUXF_GPIO_INT3 117136#define MUXF_GPIO_INT4 118137#define MUXF_GPIO_INT5 119138#define MUXF_GPIO_INT6 120139#define MUXF_GPIO_INT7 121140 141/*142 * Please don't change the order of the following defines.143 * They are based on order of items in array 'sppctl_list_funcs'144 * in Sunplus pinctrl driver.145 */146#define GROP_SPI_FLASH 122147#define GROP_SPI_FLASH_4BIT 123148#define GROP_SPI_NAND 124149#define GROP_CARD0_EMMC 125150#define GROP_SD_CARD 126151#define GROP_UA0 127152#define GROP_ACHIP_DEBUG 128153#define GROP_ACHIP_UA2AXI 129154#define GROP_FPGA_IFX 130155#define GROP_HDMI_TX 131156#define GROP_AUD_EXT_ADC_IFX0 132157#define GROP_AUD_EXT_DAC_IFX0 133158#define GROP_SPDIF_RX 134159#define GROP_SPDIF_TX 135160#define GROP_TDMTX_IFX0 136161#define GROP_TDMRX_IFX0 137162#define GROP_PDMRX_IFX0 138163#define GROP_PCM_IEC_TX 139164#define GROP_LCDIF 140165#define GROP_DVD_DSP_DEBUG 141166#define GROP_I2C_DEBUG 142167#define GROP_I2C_SLAVE 143168#define GROP_WAKEUP 144169#define GROP_UART2AXI 145170#define GROP_USB0_I2C 146171#define GROP_USB1_I2C 147172#define GROP_USB0_OTG 148173#define GROP_USB1_OTG 149174#define GROP_UPHY0_DEBUG 150175#define GROP_UPHY1_DEBUG 151176#define GROP_UPHY0_EXT 152177#define GROP_PROBE_PORT 153178 179#endif180